ADS62P48IRGC25 vs ADS5485IRGC25 比較
詳細並排比較 ADS62P48IRGC25 由 Texas Instruments 與 ADS5485IRGC25 由 Texas Instruments. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | ADS62P48IRGC25 | ADS5485IRGC25 |
|---|---|---|
| 品牌 | Texas Instruments | Texas Instruments |
| 類別 | ADC/DAC | ADC/DAC |
| 生命週期狀態 | 啟用中 | 啟用中 |
| 解析度 | 14 bit | 16 bit |
| Number of Channels | 2 (Dual) | 1 |
| Sample Rate (max) | 210 MSPS | — |
| Architecture | Pipelined | Pipelined |
| Input Type | Differential analog inputs | Buffered (differential) |
| Output Interface | DDR LVDS / Parallel CMOS (selectable) | LVDS, parallel |
| Analog Supply Voltage | 1.8 V | 5 V (nominal) |
| Digital Supply Voltage | 3.3 V | 3.3 V (nominal) |
| 工作溫度範圍 | -40 C to +85 C (Industrial) | — |
| 封裝 / 外殼 | 64-VQFN (RGC) 9x9 mm (HVQCCN) | — |
| 腳位數 | 64 | — |
| 安裝類型 | Surface Mount | Surface Mount |
| MSL 等級 | 3 | 3 (per JEDEC J-STD-020) |
| RoHS 狀態 | Compliant | Compliant |
| Lead Free | Yes | — |
| Input Clock Type | LVDS differential clock | — |
| Internal Dither | Yes (programmable) | — |
| Programmable Gain | Yes (improves SFDR at lower FS inputs) | — |
| Sample Rate | — | 200 MSPS (max) |
| Input Bandwidth | — | [DATA_NEEDED: input bandwidth (MHz)] |
| SNR | — | [DATA_NEEDED: SNR (dBFS)] |
| SFDR | — | [DATA_NEEDED: SFDR (dBc)] |
| ENOB | — | [DATA_NEEDED: ENOB (bits)] |
| Power Dissipation | — | [DATA_NEEDED: power dissipation (W)] |
| 工作溫度 | — | -40 C to +85 C (industrial) |
| 封裝 | — | 64-pin VQFN (RGC) 9x9 mm with EP |
| Family Pin Compatibility | — | ADS5481/82/83/84/85 (80-200 MSPS) |