CDK1307AILP40 vs CDK1307DILP40 比較
詳細並排比較 CDK1307AILP40 由 MaxLinear 與 CDK1307DILP40 由 MaxLinear. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | CDK1307AILP40 | CDK1307DILP40 |
|---|---|---|
| 品牌 | MaxLinear | MaxLinear |
| 類別 | ADC/DAC | ADC/DAC |
| 生命週期狀態 | 啟用中 | 啟用中 |
| 解析度 | 12/13 bit | 13 bit |
| Number of Channels | [DATA_NEEDED: number of channels] | — |
| 取樣率 | 20 MSPS | — |
| Architecture | Pipelined | — |
| Input Type | [DATA_NEEDED: input type - single-ended/differential] | — |
| SNR | 72.6 dB at 8 MHz input | 72.4 dB at Fin = 8 MHz |
| Power Dissipation | 19 mW at 20 MSPS | — |
| Core Supply Voltage | 1.8 V | — |
| I/O Supply Voltage | 1.7 V to 3.6 V | 1.7 V to 3.6 V |
| Output Interface | Parallel CMOS | Parallel CMOS |
| Reference Type | Internal | — |
| 封裝 | 40-pin QFN | 40-pin QFN |
| 安裝類型 | Surface Mount | — |
| 工作溫度 | [DATA_NEEDED: operating temperature range] | — |
| RoHS 狀態 | Compliant | — |
| Sampling Rate (max) | — | 80 MSPS |
| Power Dissipation (typ) | — | 60 mW at 80 MSPS |
| Family Power Grades | — | 17 / 19 / 33 / 50 / 60 / 75 mW across speed grades |
| Analog Supply Voltage | — | 1.8 V (core) |
| Reference | — | Internal reference circuitry |
| Clock Input | — | Differential, low-jitter |
| Track-and-Hold | — | Highly linear, optimized to Nyquist |
| Idle Modes | — | Standby and Power Down |
| Pin Compatibility | — | Pin-compatible with CDK1308 |
| Pin Compatibility (family) | — | Same 40-pin QFN for A/B/C/D speed grades |