CDK1307CILP40 vs CDK1307DILP40 比較
詳細並排比較 CDK1307CILP40 由 MaxLinear 與 CDK1307DILP40 由 MaxLinear. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | CDK1307CILP40 | CDK1307DILP40 |
|---|---|---|
| 品牌 | MaxLinear | MaxLinear |
| 類別 | ADC/DAC | ADC/DAC |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Part Number | CDK1307CILP40 | — |
| Manufacturer | MaxLinear (formerly Exar/Cadeka) | — |
| 功能 | Analog-to-Digital Converter (ADC) | — |
| 解析度 | 12-bit / 13-bit selectable | 13 bit |
| Sample Rate | 65 MSPS (family supports 20/40/65/80 MSPS) | — |
| Architecture | Multi-stage pipeline with digital error correction | — |
| Input Type | Single-ended analog input | — |
| Full-Scale Input Range | 1 Vpp typical | — |
| Supply Voltage (Analog) | 3.3 V | — |
| Supply Voltage (Digital) | 3.3 V | — |
| Reference | Internal (1.2 V bandgap) | Internal reference circuitry |
| Output Interface | Parallel CMOS | Parallel CMOS |
| Control Interface | CMOS serial configuration | — |
| 封裝 | 40-pin LQFP (LP) | 40-pin QFN |
| 工作溫度 | -40 C to +85 C (industrial) | — |
| RoHS 狀態 | Compliant | — |
| Sampling Rate (max) | — | 80 MSPS |
| Power Dissipation (typ) | — | 60 mW at 80 MSPS |
| Family Power Grades | — | 17 / 19 / 33 / 50 / 60 / 75 mW across speed grades |
| SNR | — | 72.4 dB at Fin = 8 MHz |
| Analog Supply Voltage | — | 1.8 V (core) |
| I/O Supply Voltage | — | 1.7 V to 3.6 V |
| Clock Input | — | Differential, low-jitter |
| Track-and-Hold | — | Highly linear, optimized to Nyquist |
| Idle Modes | — | Standby and Power Down |
| Pin Compatibility | — | Pin-compatible with CDK1308 |
| Pin Compatibility (family) | — | Same 40-pin QFN for A/B/C/D speed grades |