CDK1308AILP40 vs CDK1308CILP40 比較

詳細並排比較 CDK1308AILP40 由 MaxLinear 與 CDK1308CILP40 由 MaxLinear. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 CDK1308AILP40 CDK1308CILP40
品牌 MaxLinear MaxLinear
類別 ADC/DAC ADC/DAC
生命週期狀態 啟用中 啟用中
解析度 10 bit 10 bit
Maximum Sample Rate 20 MSPS —
Family Sample Rate Options 20 / 40 / 65 / 80 MSPS —
Architecture Proprietary, digital error correction Pipeline
Reference Internal (no external reference required) —
Digital Interface CMOS, parallel —
Control Interface CMOS —
Power-Down Pin (PD_N) Yes (active low) —
Sleep Pin (SLP_N) Yes (active low) —
封裝 40-pin QFN LQFP-40
安裝類型 Surface Mount —
Power Consumption Ultra-low (per family datasheet, exact value [DATA_NEEDED: power consumption mW]) —
工作溫度範圍 [DATA_NEEDED: operating temperature range] —
供應電壓 [DATA_NEEDED: AVDD / DRVDD values] —
RoHS 狀態 Compliant (per distributor listings) Compliant
Manufacturer MaxLinear (formerly Exar Corporation) —
Sampling Rate (max) — 40 MSPS
Family Sampling Rates — 20 / 40 / 65 / 80 MSPS
Number of Channels — 1
Analog Supply Voltage — 1.8 V
Digital I/O Supply Voltage — 1.7 V to 3.6 V
Power Dissipation (65 MSPS) — 38 mW
SNR — 61.6 dB at Fin = 8 MHz
Input Type — Single-ended / Differential
Reference Type — Internal
Output Interface — Parallel CMOS
工作溫度 — -40 C to +85 C
Pin Compatible With — CDK1307 family

資料表與資源

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