CDK2307CILP64 vs CDK2307AILP64 比較
詳細並排比較 CDK2307CILP64 由 MaxLinear 與 CDK2307AILP64 由 Cadeka. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | CDK2307CILP64 | CDK2307AILP64 |
|---|---|---|
| 品牌 | MaxLinear | Cadeka |
| 類別 | ADC/DAC | ADC/DAC |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Manufacturer | MaxLinear (formerly Exar / Cadeka) | Cadeka Microcircuits (MaxLinear) |
| Part Number | CDK2307CILP64 | CDK2307AILP64 |
| 功能 | Dual-channel Analog-to-Digital Converter (ADC) | — |
| Number of Channels | 2 | 2 (dual, simultaneous sampling) |
| 解析度 | 12-bit / 13-bit | 13 bit (12-bit option via CDK2308 family) |
| Maximum Sample Rate | 80 MSPS (12-bit), 65 MSPS (13-bit) | — |
| Supported Sample Rates | 20 / 40 / 65 / 80 MSPS | — |
| Converter Architecture | Pipelined with digital error correction | — |
| Input Type | Differential analog inputs | Single-ended analog input |
| Digital Output | Parallel CMOS | — |
| Data Interface | CMOS parallel | — |
| Reference Type | Internal (on-chip) | — |
| 封裝 | 64-pin QFN (LP64) with exposed pad | 64-pin QFN (LP64) with exposed pad, 9x9 mm |
| 安裝類型 | Surface Mount | Surface Mount |
| Packaging | Tray | — |
| 工作溫度範圍 | [DATA_NEEDED: operating temperature range] | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | Compliant |
| Description | — | Dual 12/13-bit 20/40/65/80 MSPS Analog-to-Digital Converter |
| Sampling Rate (this variant) | — | 20 MSPS |
| Sampling Rate (family max) | — | 80 MSPS (CDK2307AILP64 = 20 MSPS grade) |
| Output Interface | — | Parallel CMOS |
| Core Supply Voltage | — | 1.8 V |
| I/O Supply Voltage | — | 1.7 V to 3.6 V |
| Power Dissipation | — | 30 mW at 20 MSPS; 55/85/102 mW at 40/65/80 MSPS |
| Reference | — | Internal (bandgap, integrated) |
| 工作溫度 | — | -40C to +85C (industrial) [DATA_NEEDED: exact temp grade] |
| Pin Compatibility | — | Pin-compatible with CDK2308 family (12-bit variant) |