CDK2307DILP64 vs CDK1307CILP40 比較
詳細並排比較 CDK2307DILP64 由 MaxLinear 與 CDK1307CILP40 由 MaxLinear. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | CDK2307DILP64 | CDK1307CILP40 |
|---|---|---|
| 品牌 | MaxLinear | MaxLinear |
| 類別 | ADC/DAC | ADC/DAC |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Manufacturer | Cadeka Microcircuits (now MaxLinear) | MaxLinear (formerly Exar/Cadeka) |
| 功能 | Dual Analog-to-Digital Converter | Analog-to-Digital Converter (ADC) |
| 解析度 | 12-bit / 13-bit (user selectable) | 12-bit / 13-bit selectable |
| Number of Channels | 2 (dual) | — |
| 取樣率 | 20 / 40 / 65 / 80 MSPS (family-wide) | — |
| Input Type | Single-Ended | Single-ended analog input |
| Output Interface | Parallel CMOS | Parallel CMOS |
| Analog Supply Voltage | 1.7 V to 3.6 V | — |
| Digital Supply Voltage | 1.7 V to 3.6 V | — |
| Power Consumption | 102 mW per channel at 80 MSPS | — |
| Reference | Internal bandgap (external REFIN supported) | Internal (1.2 V bandgap) |
| Architecture | Pipelined with digital error correction | Multi-stage pipeline with digital error correction |
| 封裝 | QFN-64 (7 mm x 7 mm) with exposed pad | 40-pin LQFP (LP) |
| 安裝類型 | Surface Mount | — |
| 工作溫度 | [DATA_NEEDED: operating temperature range] | -40 C to +85 C (industrial) |
| RoHS 狀態 | Compliant (per distributor listings) | Compliant |
| Part Number | — | CDK1307CILP40 |
| Sample Rate | — | 65 MSPS (family supports 20/40/65/80 MSPS) |
| Full-Scale Input Range | — | 1 Vpp typical |
| Supply Voltage (Analog) | — | 3.3 V |
| Supply Voltage (Digital) | — | 3.3 V |
| Control Interface | — | CMOS serial configuration |