CDK2307DILP64 vs CDK2307AILP64 比較

詳細並排比較 CDK2307DILP64 由 MaxLinear 與 CDK2307AILP64 由 Cadeka. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 CDK2307DILP64 CDK2307AILP64
品牌 MaxLinear Cadeka
類別 ADC/DAC ADC/DAC
生命週期狀態 啟用中 啟用中
Manufacturer Cadeka Microcircuits (now MaxLinear) Cadeka Microcircuits (MaxLinear)
功能 Dual Analog-to-Digital Converter —
解析度 12-bit / 13-bit (user selectable) 13 bit (12-bit option via CDK2308 family)
Number of Channels 2 (dual) 2 (dual, simultaneous sampling)
取樣率 20 / 40 / 65 / 80 MSPS (family-wide) —
Input Type Single-Ended Single-ended analog input
Output Interface Parallel CMOS Parallel CMOS
Analog Supply Voltage 1.7 V to 3.6 V —
Digital Supply Voltage 1.7 V to 3.6 V —
Power Consumption 102 mW per channel at 80 MSPS —
Reference Internal bandgap (external REFIN supported) Internal (bandgap, integrated)
Architecture Pipelined with digital error correction —
封裝 QFN-64 (7 mm x 7 mm) with exposed pad 64-pin QFN (LP64) with exposed pad, 9x9 mm
安裝類型 Surface Mount Surface Mount
工作溫度 [DATA_NEEDED: operating temperature range] -40C to +85C (industrial) [DATA_NEEDED: exact temp grade]
RoHS 狀態 Compliant (per distributor listings) Compliant
Part Number — CDK2307AILP64
Description — Dual 12/13-bit 20/40/65/80 MSPS Analog-to-Digital Converter
Sampling Rate (this variant) — 20 MSPS
Sampling Rate (family max) — 80 MSPS (CDK2307AILP64 = 20 MSPS grade)
Core Supply Voltage — 1.8 V
I/O Supply Voltage — 1.7 V to 3.6 V
Power Dissipation — 30 mW at 20 MSPS; 55/85/102 mW at 40/65/80 MSPS
Pin Compatibility — Pin-compatible with CDK2308 family (12-bit variant)

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