CDK2308BILP64 vs CDK2308DILP64 比較
詳細並排比較 CDK2308BILP64 由 MaxLinear 與 CDK2308DILP64 由 MaxLinear. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | CDK2308BILP64 | CDK2308DILP64 |
|---|---|---|
| 品牌 | MaxLinear | MaxLinear |
| 類別 | ADC/DAC | ADC/DAC |
| 生命週期狀態 | 啟用中 | 啟用中 |
| 解析度 | 10 bit | 10 bit |
| Number of Channels | 2 (dual) | 2 (Dual) |
| Sample Rate (B grade) | 40 MSPS per channel | — |
| Family Speed Grades | 20 / 40 / 65 / 80 MSPS (A/B/C/D grades) | — |
| Architecture | Pipelined with on-chip track-and-hold | Pipelined ADC |
| Input Bandwidth | Up to 100 MHz IF (full-power) | [DATA_NEEDED: -3 dB input bandwidth] |
| Input Type | Differential analog input | Single-ended analog |
| 供應電壓 | 3.3 V (analog and digital) | — |
| Power Consumption | [DATA_NEEDED: total power at 40 MSPS] | — |
| Power-Down Modes | Per-channel, standby, full power-down | Per-channel standby, chip standby, full power-down |
| Output Interface | Parallel CMOS | — |
| 封裝 | 64-pin QFN (LP), 9x9 mm with exposed pad | 64-QFN (9x9 mm) |
| 工作溫度範圍 | [DATA_NEEDED: industrial / extended range] | -40 C to +85 C |
| 安裝類型 | Surface Mount | Surface Mount |
| MSL 等級 | [DATA_NEEDED: MSL rating] | [DATA_NEEDED: MSL rating] |
| RoHS 狀態 | Compliant | Compliant |
| Lead-Free | Yes | — |
| Datasheet Document | Cadeka / Exar CDK2308 family datasheet (15 pages) | — |
| Sampling Rate (max) | — | 80 MSPS |
| Supported Sample Rates | — | 20 / 40 / 65 / 80 MSPS (programmable) |
| Power Dissipation | — | 78 mW per channel at 80 MSPS |
| Supply Voltage (AVDD) | — | [DATA_NEEDED: AVDD nominal voltage] |
| Supply Voltage (DRVDD) | — | [DATA_NEEDED: DRVDD nominal voltage] |
| SNR | — | [DATA_NEEDED: SNR at full scale] |
| SFDR | — | [DATA_NEEDED: SFDR] |
| ENOB | — | [DATA_NEEDED: effective number of bits] |
| Track-and-Hold Amplifier | — | Integrated, optimized for IF frequencies |