CDK2308CILP64 vs CDK2307CILP64 比較
詳細並排比較 CDK2308CILP64 由 MaxLinear 與 CDK2307CILP64 由 MaxLinear. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | CDK2308CILP64 | CDK2307CILP64 |
|---|---|---|
| 品牌 | MaxLinear | MaxLinear |
| 類別 | ADC/DAC | ADC/DAC |
| 生命週期狀態 | 啟用中 | 啟用中 |
| 解析度 | 10 bit | 12-bit / 13-bit |
| Number of Channels | 2 (dual) | 2 |
| Sample Rate (max) | 65 MSPS per channel | — |
| Architecture | Pipelined | — |
| Input Type | Differential, single-ended capable | Differential analog inputs |
| Analog Supply Voltage | 3.3 V | — |
| Digital Output Supply | 1.8 V to 3.3 V | — |
| Digital Output Interface | Parallel CMOS | — |
| Data Rate (per channel) | Up to 65 MSPS | — |
| Reference | Internal bandgap; external reference supported | — |
| Sample-Rate Family | 20 / 40 / 65 / 80 MSPS (per datasheet family) | — |
| 封裝 | 64-pin QFN with Exposed Pad (EP) | 64-pin QFN (LP64) with exposed pad |
| 安裝類型 | Surface Mount | Surface Mount |
| 工作溫度 | -40 C to +85 C (industrial) | — |
| RoHS 狀態 | Compliant | [DATA_NEEDED: RoHS status] |
| Manufacturer | — | MaxLinear (formerly Exar / Cadeka) |
| Part Number | — | CDK2307CILP64 |
| 功能 | — | Dual-channel Analog-to-Digital Converter (ADC) |
| Maximum Sample Rate | — | 80 MSPS (12-bit), 65 MSPS (13-bit) |
| Supported Sample Rates | — | 20 / 40 / 65 / 80 MSPS |
| Converter Architecture | — | Pipelined with digital error correction |
| Digital Output | — | Parallel CMOS |
| Data Interface | — | CMOS parallel |
| Reference Type | — | Internal (on-chip) |
| Packaging | — | Tray |
| 工作溫度範圍 | — | [DATA_NEEDED: operating temperature range] |