DG441DY+ vs DG441DYZ 比較
詳細並排比較 DG441DY+ 由 Analog Devices 與 DG441DYZ 由 Renesas Electronics. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | DG441DY+ | DG441DYZ |
|---|---|---|
| 品牌 | Analog Devices | Renesas Electronics |
| 類別 | Interface ICs | Interface ICs |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Number of Switches | 4 circuits | — |
| Switch Configuration | 1:1 SPST-NC per channel | — |
| Maximum On-Resistance | 85 ohm | — |
| On-Resistance Matching Between Switches | 4 ohm maximum | — |
| On-Resistance Flatness Over Signal Range | 9 ohm maximum | — |
| Charge Injection | 10 pC maximum | [DATA_NEEDED: QINJ] |
| Power Consumption | 1.65 mW | — |
| ESD Tolerance | 2000 V minimum | — |
| Single-Supply Voltage Range | 4.5 V to 20 V | — |
| Dual-Supply Voltage Range | 10 V to 30 V | — |
| 封裝 | 16-SOIC, 16 pins | 16-SOIC (0.154" / 3.90 mm width) |
| Package Width | 3.90 mm | — |
| 安裝類型 | Surface mount | Surface Mount |
| Production Status | Production | — |
| Signal Direction | Bidirectional | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | Compliant (per Heisener listing) |
| REACH Status | [DATA_NEEDED: REACH status] | — |
| AEC-Q100 Qualification | [DATA_NEEDED: AEC-Q100 qualification] | — |
| 工作溫度範圍 | [DATA_NEEDED: operating temperature range] | — |
| Switch Type | — | SPST (Single-Pole Single-Throw), 4 independent channels |
| Number of Circuits | — | 4 |
| On-Resistance (Ron) | — | 85 Ω (typical) |
| On-Resistance Flatness | — | [DATA_NEEDED: Ron flatness] |
| Supply Voltage (Single) | — | +5 V to +34 V |
| Supply Voltage (Dual) | — | ±5 V to ±22 V |
| Maximum Signal Voltage | — | 44 V (allows 40 Vp-p signals) |
| Turn-On Time (tON) | — | 250 ns (typical) |
| Turn-Off Time (tOFF) | — | [DATA_NEEDED: tOFF] |
| Bandwidth (-3 dB) | — | 200 MHz (typical) |
| Channel-to-Channel Crosstalk | — | [DATA_NEEDED: crosstalk] |
| Off-Isolation | — | [DATA_NEEDED: off-isolation] |
| Leakage Current (Switch Off) | — | [DATA_NEEDED: Ioff] |
| Logic Input Compatibility | — | TTL and CMOS, with on-chip Vref threshold translator |
| 工作溫度 | — | -40 °C to +85 °C |
| Latch-up Protection | — | Yes (epitaxial CMOS process) |