EP1810GC-35 vs EP1810GI-45 比較

詳細並排比較 EP1810GC-35 由 Altera 與 EP1810GI-45 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Altera
EP1810GC-35 EP1810GC-35 - UV PLD, 40ns, CMOS, CPGA68 | Altera / Rochester

EP1810GC-35 - UV PLD, 40ns, CMOS, CPGA68 | Altera / Rochester

EP1810GC-35 ⚠ 最後購買機會

規格比較

參數 EP1810GC-35 EP1810GI-45
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 最後購買 Obsolete
Device Type EPLD (Erasable Programmable Logic Device) UV Erasable Programmable Logic Device (EPLD)
Logic Family Altera Classic EPLD —
Technology CMOS, UV-erasable EPROM cells CMOS
封裝 CPGA-68 (Ceramic Pin Grid Array, 68-pin) —
腳位數 68 —
Propagation Delay (tpd max) 40 ns —
Maximum Inputs 64 —
Maximum Outputs 48 —
Macrocells 16 24
I/O Standard TTL-compatible —
Programming Method UV erasure + EPROM programming —
工作溫度 [DATA_NEEDED: operating temperature range] [DATA_NEEDED: operating temperature range]
供應電壓 [DATA_NEEDED: VCC range] [DATA_NEEDED: VCC range]
安裝類型 Through Hole Through-Hole
RoHS 狀態 Not applicable (legacy ceramic package) Non-compliant (ceramic PGA)
Lead-Free Status Not applicable —
Manufacturer (current source) Rochester Electronics (authorized Altera EPLD partner) —
Original Manufacturer Altera Corporation (now Intel FPGA) —
Family — Altera Classic EPLD
Flip-Flops — 48
Propagation Delay (tpd) — 45 ns
Speed Grade — -45
Package Type — Ceramic Pin Grid Array with UV window
腳位數 — 68
Programmable — Yes (UV-erasable, electrically programmable)
Lead-Free — No

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