EP1810LC-20 vs EP1830-20CFN 比較
詳細並排比較 EP1810LC-20 由 Intel 與 EP1830-20CFN 由 Texas Instruments. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP1810LC-20 | EP1830-20CFN |
|---|---|---|
| 品牌 | Intel | Texas Instruments |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | Classic EPLD | — |
| Device Type | EPLD (Erasable Programmable Logic Device) | Erasable Programmable Logic Device (EPLD) |
| Usable Gates | 900 | — |
| Macrocells | 48 | — |
| Maximum Operating Frequency | 50 MHz | — |
| Propagation Delay (tPD) | 20 ns | 22 ns |
| 供應電壓 | 5 V (4.75 V to 5.25 V) | — |
| Technology | CMOS EPROM | CMOS EPROM |
| Programmability | UV-Erasable / OTP | — |
| Dedicated Inputs | 12 | 12 |
| 封裝 | 68-pin PLCC | PLCC-68 (QCCJ, J-lead) |
| Package Suffix | LC (PLCC, windowed for UV erase on L variant) | — |
| Speed Grade | 20 ns (commercial) | -20 |
| 工作溫度 | 0C to +70C (commercial) | — |
| 安裝類型 | Surface Mount | — |
| RoHS 狀態 | [DATA_NEEDED: rohs status] | [DATA_NEEDED: RoHS status] |
| Macrocell Count | — | 48 |
| Maximum Supply Voltage | — | 5.25 V |
| I/O Pins | — | 48 |
| Terminal Pitch | — | 1.27 mm |
| Terminal Form | — | J-Bend |
| Package Code | — | QCCJ |
| Package Shape | — | Square |
| Operating Temperature Grade | — | Commercial (0C to 70C) |
| Typical Operating Current | — | 20 mA at 1 MHz |
| Maximum Counter Frequency | — | 50 MHz (4 x 12-bit counters) |
| Configuration Memory | — | Non-volatile EPROM (UV-erasable) |