EP1830-20CFN vs EP1810LC-20 比較
詳細並排比較 EP1830-20CFN 由 Texas Instruments 與 EP1810LC-20 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP1830-20CFN | EP1810LC-20 |
|---|---|---|
| 品牌 | Texas Instruments | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Device Type | Erasable Programmable Logic Device (EPLD) | EPLD (Erasable Programmable Logic Device) |
| Technology | CMOS EPROM | CMOS EPROM |
| Macrocell Count | 48 | — |
| Propagation Delay (tPD) | 22 ns | 20 ns |
| Maximum Supply Voltage | 5.25 V | — |
| I/O Pins | 48 | — |
| Dedicated Inputs | 12 | 12 |
| 封裝 | PLCC-68 (QCCJ, J-lead) | 68-pin PLCC |
| Terminal Pitch | 1.27 mm | — |
| Terminal Form | J-Bend | — |
| Package Code | QCCJ | — |
| Package Shape | Square | — |
| Operating Temperature Grade | Commercial (0C to 70C) | — |
| Typical Operating Current | 20 mA at 1 MHz | — |
| Maximum Counter Frequency | 50 MHz (4 x 12-bit counters) | — |
| Speed Grade | -20 | 20 ns (commercial) |
| Configuration Memory | Non-volatile EPROM (UV-erasable) | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: rohs status] |
| Family | — | Classic EPLD |
| Usable Gates | — | 900 |
| Macrocells | — | 48 |
| Maximum Operating Frequency | — | 50 MHz |
| 供應電壓 | — | 5 V (4.75 V to 5.25 V) |
| Programmability | — | UV-Erasable / OTP |
| Package Suffix | — | LC (PLCC, windowed for UV erase on L variant) |
| 工作溫度 | — | 0C to +70C (commercial) |
| 安裝類型 | — | Surface Mount |