EP1AGX50DF1152I4N vs EP1AGX50DF1152I5N 比較
詳細並排比較 EP1AGX50DF1152I4N 由 Altera 與 EP1AGX50DF1152I5N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP1AGX50DF1152I4N | EP1AGX50DF1152I5N |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | Obsolete |
| Family | Arria GX | Arria GX |
| Logic Elements (LE) | 50160 | — |
| User I/O Pins | 514 | — |
| Embedded Memory | 2475072 bits | 2475072 bits (approximately 2420 Kbit) |
| Maximum User I/O Banks | [DATA_NEEDED: number of IO banks] | — |
| Transceivers | Up to 3.125 Gbps multi-gigabit transceivers | — |
| 封裝 | 1152-ball FineLine BGA | 1152-BBGA (FineLine BGA, flip-chip) |
| Speed Grade | I4 | 5 |
| 工作溫度 | -40C to +100C (Industrial) | -40C to +100C (Industrial) |
| 安裝類型 | Surface Mount | Surface Mount |
| MSL 等級 | [DATA_NEEDED: MSL level] | — |
| Lead-Free / RoHS | Yes (RoHS Compliant) | — |
| Process Node | [DATA_NEEDED: process technology] | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | — |
| PLL Count | [DATA_NEEDED: PLL count] | — |
| Configuration Method | Passive serial / Fast passive parallel / JTAG | SRAM, JTAG, Passive Serial, Fast Passive Parallel |
| Logic Elements | — | 50160 |
| Logic Array Blocks (LABs) | — | 2508 |
| Total Memory Bits | — | 2475072 |
| Number of I/O | — | 514 |
| Number of Transceivers | — | [DATA_NEEDED: number of transceiver channels] |
| Transceiver Data Rate | — | 3.125 Gbps |
| Supply Voltage Core | — | 1.2 V |
| Package Code | — | F1152 |
| Temperature Grade | — | I (Industrial) |
| RoHS 狀態 | — | Compliant (lead-free) |