EP1K100FC256-3N vs EP1K100FC256-1N 比較

詳細並排比較 EP1K100FC256-3N 由 Altera 與 EP1K100FC256-1N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Altera
EP1K100FC256-3N EP1K100FC256-3N - ACEX 1K FPGA 100K Gates | Altera

EP1K100FC256-3N - ACEX 1K FPGA 100K Gates | Altera

EP1K100FC256-3N Obsolete

規格比較

參數 EP1K100FC256-3N EP1K100FC256-1N
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Product Family ACEX 1K —
Programmable Logic Type FPGA (Field Programmable Gate Array) —
Number of Logic Elements/Cells 4992 —
Number of LABs 624 —
Total RAM Bits 49152 —
Number of User I/Os 186 —
Typical Gate Count 100000 —
Core Supply Voltage (VCCINT) 2.5 V —
Process Technology 0.22 um 0.18 µm SRAM-based
封裝 256-BGA (FBGA) 256-ball FineLine BGA
Number of Pins/Terminals 256 —
安裝類型 Surface Mount —
Terminal Form BALL —
Package Code BGA —
Speed Grade -3 (commercial) -1
Maximum Internal Frequency [DATA_NEEDED: maximum internal frequency; conflicts in listings: 200 MHz vs 250 MHz, use timing report] —
Operating Temperature Grade Commercial (per Partstack listing) —
Number of EABs [DATA_NEEDED: number of embedded array blocks] —
RoHS 狀態 [DATA_NEEDED: N suffix suggests lead-free but no certificate found] —
Family — ACEX-1K
Logic Elements — 4,992
Typical Gates — 100,000
Maximum User I/O — 186
Embedded SRAM — 49,152 bits
Logic Array Blocks (LABs) — 624
Embedded Array Blocks (EABs) — 12
Core Voltage — 2.5 V
I/O Standards Supported — LVTTL, LVCMOS, PCI, SSTL (1.5 V / 1.8 V / 2.5 V / 3.3 V)
Operating Temperature (Commercial) — 0 °C to +70 °C
Configuration Mode — Passive Serial / Passive Parallel (Synchronous & Asynchronous)
JTAG Support — IEEE 1149.1 Boundary-Scan
Lead-Free (N suffix) — Yes (Pb-free BGA)

資料表與資源

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