EP1K100QC208-1N vs EP1K100QC208-3N 比較

詳細並排比較 EP1K100QC208-1N 由 Altera 與 EP1K100QC208-3N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Altera
EP1K100QC208-1N EP1K100QC208-1N - ACEX 1K FPGA 4992 Cells | Altera

EP1K100QC208-1N - ACEX 1K FPGA 4992 Cells | Altera

EP1K100QC208-1N Obsolete
Altera
EP1K100QC208-3N EP1K100QC208-3N - ACEX-1K FPGA 100K Gates | Altera

EP1K100QC208-3N - ACEX-1K FPGA 100K Gates | Altera

EP1K100QC208-3N Obsolete

規格比較

參數 EP1K100QC208-1N EP1K100QC208-3N
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Product Family ACEX 1K —
Device Series EP1K100 —
Number of Logic Elements/Cells 4992 —
Number of LABs/CLBs 624 —
Total RAM Bits 49152 —
Number of I/O 147 —
Number of Gates 100000 —
Max Internal Frequency (parametric) 333.33 MHz —
Core Supply Voltage 2.5 V 2.5 V
Process Technology 0.22 um CMOS —
Package Type 208-Pin PQFP 208-BFQFP
Package Code 208-BFQFP —
Speed Grade -1 —
安裝類型 Surface Mount Surface Mount
工作溫度範圍 [DATA_NEEDED: operating temperature range] Commercial grade ([DATA_NEEDED: exact operating temperature range])
RoHS 狀態 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS certificate status]
Number of Embedded Array Blocks [DATA_NEEDED: number of EABs] —
Configuration Interface [DATA_NEEDED: configuration interface] —
Product Series — ACEX-1K
Device Type — Field Programmable Gate Array (FPGA)
Number of Logic Elements — 4992
Number of LABs — 624
Embedded RAM Bits — 49152
Total Typical Gates — 100K
Number of User I/Os — 147
I/O Supply Voltage Range — [DATA_NEEDED: I/O supply voltage range]
Maximum Internal Clock Frequency — 200 MHz
腳位數 — 208
Terminal Form — Gull Wing
JTAG Boundary Scan — IEEE Std. 1149.1-1990 compliant built-in BST
Lead-Free Version — Yes (N suffix)
Supported Configuration Devices — EPC2/EPC16 family ([DATA_NEEDED: exact ACEX-1K supported list])
Moisture Sensitivity Level — [DATA_NEEDED: MSL level]

資料表與資源

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