EP1K100QC208-1N vs EP1K100QI208-2N 比較

詳細並排比較 EP1K100QC208-1N 由 Altera 與 EP1K100QI208-2N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Altera
EP1K100QC208-1N EP1K100QC208-1N - ACEX 1K FPGA 4992 Cells | Altera

EP1K100QC208-1N - ACEX 1K FPGA 4992 Cells | Altera

EP1K100QC208-1N Obsolete

規格比較

參數 EP1K100QC208-1N EP1K100QI208-2N
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Product Family ACEX 1K —
Device Series EP1K100 —
Number of Logic Elements/Cells 4992 4992
Number of LABs/CLBs 624 624
Total RAM Bits 49152 49152
Number of I/O 147 —
Number of Gates 100000 —
Max Internal Frequency (parametric) 333.33 MHz —
Core Supply Voltage 2.5 V 2.5 V
Process Technology 0.22 um CMOS —
Package Type 208-Pin PQFP —
Package Code 208-BFQFP —
Speed Grade -1 -2
安裝類型 Surface Mount Surface Mount
工作溫度範圍 [DATA_NEEDED: operating temperature range] [DATA_NEEDED: exact industrial temperature limits from ACEX-1K datasheet]
RoHS 狀態 [DATA_NEEDED: RoHS status] [DATA_NEEDED: manufacturer RoHS certificate]
Number of Embedded Array Blocks [DATA_NEEDED: number of EABs] —
Configuration Interface [DATA_NEEDED: configuration interface] —
Series — ACEX-1K
FPGA Family — ACEX-1K
Number of User I/O — 147
封裝 / 外殼 — 208-BFQFP
Temperature Grade — I (industrial)
System Gates — 257000
Typical Gate Count — 100K gates (family)
Max User I/O in 208-BFQFP — 147
Total Number of Configuration Bits — [DATA_NEEDED: configuration bitstream size]
Maximum Internal Clock Frequency — [DATA_NEEDED: clock frequency for -2 speed grade]
I/O Standard Support — [DATA_NEEDED: supported I/O standards]
PLL/Clock Management — [DATA_NEEDED: PLL availability on EP1K100]

資料表與資源

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