EP1K100QC208-3 vs EP1K100QC208-1N 比較

詳細並排比較 EP1K100QC208-3 由 Altera 與 EP1K100QC208-1N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Altera
EP1K100QC208-1N EP1K100QC208-1N - ACEX 1K FPGA 4992 Cells | Altera

EP1K100QC208-1N - ACEX 1K FPGA 4992 Cells | Altera

EP1K100QC208-1N Obsolete

規格比較

參數 EP1K100QC208-3 EP1K100QC208-1N
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 NRND Obsolete
Product Family ACEX 1K ACEX 1K
Device Type FPGA (Field Programmable Gate Array) —
Process Technology 0.22 um CMOS 0.22 um CMOS
Typical Gate Count 100,000 gates —
Number of Logic Elements 4,992 —
Logic Array Blocks (LABs) 624 —
Total RAM Bits 49,152 bits 49152
Maximum User I/O 147 —
Maximum Internal Clock Frequency 200 MHz —
Core Supply Voltage 2.5 V 2.5 V
Package Type 208-Pin BFQFP (PQFP) 208-Pin PQFP
Number of Terminals 208 —
Terminal Form Gull Wing —
Package Shape Square —
Temperature Grade Commercial —
安裝類型 Surface Mount Surface Mount
Speed Grade -3 -1
RoHS / Lead-Free Suffix No -N suffix; compliance not verified in retrieved source data —
I/O Standards Supported [DATA_NEEDED: supported I/O standards] —
Configuration Memory SRAM-based loadable PLD —
Device Series — EP1K100
Number of Logic Elements/Cells — 4992
Number of LABs/CLBs — 624
Number of I/O — 147
Number of Gates — 100000
Max Internal Frequency (parametric) — 333.33 MHz
Package Code — 208-BFQFP
工作溫度範圍 — [DATA_NEEDED: operating temperature range]
RoHS 狀態 — [DATA_NEEDED: RoHS status]
Number of Embedded Array Blocks — [DATA_NEEDED: number of EABs]
Configuration Interface — [DATA_NEEDED: configuration interface]

資料表與資源

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