EP1K100QC208-3N vs EP1K10QC208-3 比較

詳細並排比較 EP1K100QC208-3N 由 Altera 與 EP1K10QC208-3 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Altera
EP1K100QC208-3N EP1K100QC208-3N - ACEX-1K FPGA 100K Gates | Altera

EP1K100QC208-3N - ACEX-1K FPGA 100K Gates | Altera

EP1K100QC208-3N Obsolete

規格比較

參數 EP1K100QC208-3N EP1K10QC208-3
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete NRND
Product Series ACEX-1K —
Device Type Field Programmable Gate Array (FPGA) —
Number of Logic Elements 4992 —
Number of LABs 624 —
Embedded RAM Bits 49152 —
Total Typical Gates 100K —
Number of User I/Os 147 —
Core Supply Voltage 2.5 V —
I/O Supply Voltage Range [DATA_NEEDED: I/O supply voltage range] —
Maximum Internal Clock Frequency 200 MHz —
Package Type 208-BFQFP —
腳位數 208 —
安裝類型 Surface Mount Surface Mount
Terminal Form Gull Wing —
JTAG Boundary Scan IEEE Std. 1149.1-1990 compliant built-in BST —
Lead-Free Version Yes (N suffix) —
工作溫度範圍 Commercial grade ([DATA_NEEDED: exact operating temperature range]) —
Supported Configuration Devices EPC2/EPC16 family ([DATA_NEEDED: exact ACEX-1K supported list]) —
Moisture Sensitivity Level [DATA_NEEDED: MSL level] —
RoHS 狀態 [DATA_NEEDED: RoHS certificate status] Compliant
Family — ACEX-1K
Typical Gate Count — 10,000 gates
Logic Elements (LEs) — 576
Embedded System Blocks (EABs) — 3 (each 4 Kbit, dual-port capable)
Total RAM Bits — 12,288 bits
Logic Array Blocks (LABs) — 72
Maximum User I/O Pins — 120
Supply Voltage - Core — 2.5 V
Supply Voltage - I/O — 3.3 V (multi-standard I/O)
Speed Grade — -3
封裝 — 208-pin PQFP (BFQFP)
Process Technology — 0.22 µm SRAM CMOS
工作溫度 — Commercial (0C to +70C)
MSL 等級 — 3 (per JEDEC J-STD-020)

資料表與資源

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