EP1K100QI208-3 vs EP1K100QC208-3N 比較

詳細並排比較 EP1K100QI208-3 由 Altera 與 EP1K100QC208-3N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Altera
EP1K100QC208-3N EP1K100QC208-3N - ACEX-1K FPGA 100K Gates | Altera

EP1K100QC208-3N - ACEX-1K FPGA 100K Gates | Altera

EP1K100QC208-3N Obsolete

規格比較

參數 EP1K100QI208-3 EP1K100QC208-3N
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Family ACEX 1K (FLEX 10K) —
Logic Cells 4,992 —
Configurable Logic Blocks (CLBs) 624 —
Approximate System Gates 100,000 —
User I/O Pins 147 —
Dedicated Inputs 6 —
Core Supply Voltage (VCCINT) 2.5 V nominal (max 2.625 V) —
I/O Supply Voltage (VCCIO) [DATA_NEEDED: VCCIO min/max range] —
Speed Grade -3 (fastest) —
工作溫度 -40 °C to +85 °C (industrial) —
封裝 208-pin PQFP (QFP, gull-wing) —
Terminal Count 208 —
Terminal Form Gull Wing Gull Wing
Package Code QFP (Power Quad Flat Pack) —
安裝類型 Surface Mount Surface Mount
Configuration Method SRAM, serial/parallel (EPC2/EPC4 supported) —
Embedded Memory EAB blocks (RAM/ROM/multiplier) —
RoHS 狀態 [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS certificate status]
Product Series — ACEX-1K
Device Type — Field Programmable Gate Array (FPGA)
Number of Logic Elements — 4992
Number of LABs — 624
Embedded RAM Bits — 49152
Total Typical Gates — 100K
Number of User I/Os — 147
Core Supply Voltage — 2.5 V
I/O Supply Voltage Range — [DATA_NEEDED: I/O supply voltage range]
Maximum Internal Clock Frequency — 200 MHz
Package Type — 208-BFQFP
腳位數 — 208
JTAG Boundary Scan — IEEE Std. 1149.1-1990 compliant built-in BST
Lead-Free Version — Yes (N suffix)
工作溫度範圍 — Commercial grade ([DATA_NEEDED: exact operating temperature range])
Supported Configuration Devices — EPC2/EPC16 family ([DATA_NEEDED: exact ACEX-1K supported list])
Moisture Sensitivity Level — [DATA_NEEDED: MSL level]

資料表與資源

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