EP1K30QC208-2 vs EP1K30QC208-3N 比較

詳細並排比較 EP1K30QC208-2 由 Altera 與 EP1K30QC208-3N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Altera
EP1K30QC208-3N EP1K30QC208-3N - ACEX-1K FPGA, 30K Gates, 208-PQFP | Altera

EP1K30QC208-3N - ACEX-1K FPGA, 30K Gates, 208-PQFP | Altera

EP1K30QC208-3N ⚠ 最後購買機會

規格比較

參數 EP1K30QC208-2 EP1K30QC208-3N
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete 最後購買
Family ACEX 1K ACEX-1K
Number of Logic Elements (LEs) 1,728 —
Number of LABs/CLBs 216 —
Total RAM Bits 24,576 —
Number of User I/O 147 —
Number of Dedicated Inputs 6 —
Typical Equivalent Gates 30,000 —
封裝 / 外殼 208-BFQFP / PQFP 208 —
Number of Terminals 208 —
Package Shape Square —
Terminal Form Gull Wing —
Terminal Pitch 0.5 mm —
Core Supply Voltage (VCCINT) 2.375 V to 2.625 V (nominal 2.5 V) —
工作溫度範圍 0 C to 70 C —
Speed Grade 2 -3 (fastest)
安裝類型 Surface Mount Surface Mount
Technology CMOS 2.5 V —
RoHS 狀態 Unknown from fetched source Compliant (lead-free / Pb-free)
Logic Elements — 1,728
Typical Gates — 30,000
Logic Array Blocks (LABs) — 172
Embedded Array Blocks (EABs) — 6 (24 Kbits total)
Maximum User I/O — 147
封裝 — 208-BQFP / 208-PQFP
工作溫度 — Industrial (N suffix)
Process Technology — 0.18 µm CMOS, SRAM-based LUT
Core Supply Voltage — 2.5 V
I/O Supply Voltage (VCCIO) — 3.3 V (5 V tolerant I/O supported)
Configuration Interface — Serial / Parallel / JTAG (IEEE 1149.1)

資料表與資源

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