EP1K30QC208-3N vs EP1K30QC208-1 比較

詳細並排比較 EP1K30QC208-3N 由 Altera 與 EP1K30QC208-1 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Altera
EP1K30QC208-3N EP1K30QC208-3N - ACEX-1K FPGA, 30K Gates, 208-PQFP | Altera

EP1K30QC208-3N - ACEX-1K FPGA, 30K Gates, 208-PQFP | Altera

EP1K30QC208-3N ⚠ 最後購買機會

規格比較

參數 EP1K30QC208-3N EP1K30QC208-1
品牌 Altera Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 最後購買 Obsolete
Family ACEX-1K —
Logic Elements 1,728 —
Typical Gates 30,000 —
Logic Array Blocks (LABs) 172 216
Embedded Array Blocks (EABs) 6 (24 Kbits total) —
Maximum User I/O 147 147
封裝 208-BQFP / 208-PQFP 208-BFQFP (Plastic Quad Flat Pack, PQFP208)
安裝類型 Surface Mount Surface Mount (gull-wing leads)
工作溫度 Industrial (N suffix) 0 °C to +70 °C (commercial)
Speed Grade -3 (fastest) —
Process Technology 0.18 µm CMOS, SRAM-based LUT 2.5 V CMOS
Core Supply Voltage 2.5 V —
I/O Supply Voltage (VCCIO) 3.3 V (5 V tolerant I/O supported) —
Configuration Interface Serial / Parallel / JTAG (IEEE 1149.1) —
RoHS 狀態 Compliant (lead-free / Pb-free) Compliant (lead-free)
Device Family — ACEX-1K
Logic Elements (LEs) — 1,728
Equivalent Gates — 30,000
Embedded Memory (EAB) — 24,576 bits
Core Supply Voltage (VCCINT) — 2.5 V (2.375 V to 2.625 V)
Terminal Pitch — 0.500 mm
Maximum Operating Frequency — up to 250 MHz (family typical)
Configuration Method — SRAM, in-system reconfigurable (volatile)
Boundary-Scan Test — JTAG IEEE 1149.1
I/O Voltage Support — 2.5 V / 3.3 V (multi-volt I/O)
Configuration Device Support — EPC2, EPC4, EPC8 Enhanced Configuration Devices

資料表與資源

瀏覽所有產品 建立 BOM 索取報價