EP1K30QI208-3N vs EP1K30QC208-2N 比較
詳細並排比較 EP1K30QI208-3N 由 Altera 與 EP1K30QC208-2N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EP1K30QI208-3N - 30K Gate ACEX 1K FPGA, 147 I/O, 208-PQFP | Intel (Altera)
EP1K30QI208-3N Obsolete規格比較
| 參數 | EP1K30QI208-3N | EP1K30QC208-2N |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Series | ACEX 1K | ACEX 1K |
| Family | ACEX-1K | ACEX 1K |
| Logic Elements / Cells | 1728 | 1,728 |
| Total RAM Bits | 24576 | 24,576 (24 Kbit embedded memory) |
| Number of I/O | 147 | 147 |
| Number of Dedicated Inputs | 6 | — |
| Number of Gates (typical) | 30000 | — |
| Number of Embedded Array Blocks | 6 | — |
| Core Supply Voltage | 2.375 V to 2.625 V (nominal 2.5 V) | — |
| I/O Standards | LVTTL, LVCMOS (multi-voltage I/O) | — |
| 工作溫度 | -40 C to +85 C (industrial) | 0°C to +70°C (commercial) |
| Speed Grade | -3 | — |
| 封裝 | 208-pin PQFP / FQFP (S-PQFP-G208), 0.5 mm pitch | — |
| Configuration Memory | Volatile SRAM (serial configuration required) | — |
| Programming Interface | JTAG (IEEE 1149.1) + serial configuration | — |
| 安裝類型 | Surface Mount (fine-pitch QFP) | Surface Mount |
| RoHS 狀態 | Compliant | unknown (legacy part, pre-RoHS-era design) |
| Typical Gates | — | 30,000 |
| Number of LABs/CLBs | — | 216 |
| Number of Gates | — | 30,000 |
| Core Supply Voltage (VCCINT) | — | 2.5 V |
| Technology Node | — | 0.22 µm CMOS |
| Operating Frequency (max) | — | 200 MHz |
| 封裝 / 外殼 | — | 208-BFQFP (PQFP) |
| Configuration Method | — | SRAM (volatile) - serial/parallel/JTAG |