EP1K30QI208-3N vs EP1K30QI208-2 比較

詳細並排比較 EP1K30QI208-3N 由 Altera 與 EP1K30QI208-2 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP1K30QI208-3N EP1K30QI208-2
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Series ACEX 1K ACEX-1K
Family ACEX-1K —
Logic Elements / Cells 1728 —
Total RAM Bits 24576 24,576
Number of I/O 147 —
Number of Dedicated Inputs 6 —
Number of Gates (typical) 30000 —
Number of Embedded Array Blocks 6 —
Core Supply Voltage 2.375 V to 2.625 V (nominal 2.5 V) 2.5 V
I/O Standards LVTTL, LVCMOS (multi-voltage I/O) —
工作溫度 -40 C to +85 C (industrial) —
Speed Grade -3 -2
封裝 208-pin PQFP / FQFP (S-PQFP-G208), 0.5 mm pitch —
Configuration Memory Volatile SRAM (serial configuration required) —
Programming Interface JTAG (IEEE 1149.1) + serial configuration —
安裝類型 Surface Mount (fine-pitch QFP) Surface Mount
RoHS 狀態 Compliant [DATA_NEEDED: RoHS status for non-N variant]
Product Category — FPGA - Field Programmable Gate Array
Number of Logic Elements/Cells — 1,728
Number of User I/Os — 147
Number of Typical Gates — 30,000
最大時脈頻率 — 200 MHz
封裝 / 外殼 — 208-BFQFP (PQFP-208)
Package Code — FQFP
Package Shape — SQUARE
Terminal Form — GULL WING
Number of Terminals — 208
Temperature Grade — Industrial (I)
工作溫度範圍 — [DATA_NEEDED: exact operating temperature range in degrees C]
Propagation Delay — 0.4 ns (per AiPCBA programming manual summary)
Memory Features — Enhanced embedded array with dual-port SRAM support
Supported I/O Standards — [DATA_NEEDED: supported I/O standards]
Configuration Device — [DATA_NEEDED: required configuration device]

資料表與資源

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