EP1K30TC144-3 vs EP1K30TC144-1 比較
詳細並排比較 EP1K30TC144-3 由 Intel 與 EP1K30TC144-1 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP1K30TC144-3 | EP1K30TC144-1 |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | NRND |
| Series | ACEX-1K | ACEX-1K |
| Logic Elements / Cells | 1,728 | — |
| Total RAM Bits | 24,576 | 24,576 |
| Number of LABs/CLBs | 216 | — |
| Typical Gates | 30,000 | — |
| Maximum System Gates | 56,000 | — |
| Number of User I/O | 102 | — |
| Number of Logic Array Blocks | 216 | — |
| Supply Voltage (Core) | 2.5 V | — |
| I/O Voltage Standard | 2.5 V LVCMOS / LVTTL (MultiVolt up to 5.0 V tolerant) | — |
| Process Technology | 0.22 µm SRAM | — |
| Operating Temperature (Commercial) | 0C to +70C | — |
| 封裝 | 144-LQFP / 144-TQFP (22x22 mm, 0.5 mm pitch) | 144-LQFP (TQFP) |
| 安裝類型 | Surface Mount | Surface Mount |
| Speed Grade | -3 (slowest speed bin) | -1 (slowest in ACEX-1K family) |
| Configuration Method | Serial configuration device (EPC2/EPC8 compatible) | SRAM, in-system programmable |
| Boundary Scan | IEEE 1149.1 JTAG compliant | — |
| Number of Global Clocks | 8 | — |
| RoHS 狀態 | [DATA_NEEDED: rohs status from datasheet] | [DATA_NEEDED: RoHS status not in verified data] |
| Family | — | ACEX 1K |
| Equivalent Gates | — | 30,000 |
| Number of Logic Elements / Cells | — | 1,728 |
| Number of LABs / CLBs | — | 216 |
| Number of I/O | — | 102 |
| Core Supply Voltage | — | 2.5 V |
| Technology | — | CMOS, SRAM-based |
| 工作溫度 | — | 0C to +70C (commercial) |