EP1K50F256-2N vs EP1K50FC256-2 比較

詳細並排比較 EP1K50F256-2N 由 Altera 與 EP1K50FC256-2 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP1K50F256-2N EP1K50FC256-2
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Family ACEX 1K ACEX 1K Family
Logic Elements 2,880 —
Typical Gates 50,000 50,000
Total RAM Bits 40,960 40,960
Logic Array Blocks (LABs) 360 —
Embedded Array Blocks (EABs) 5 —
Maximum User I/O 186 —
封裝 256-ball FineLine BGA (F256), 1.0 mm pitch —
Speed Grade -2 —
工作溫度 0C to +70C (commercial) 0°C to +70°C (commercial)
Core Voltage 3.3 V —
I/O Standards LVTTL, LVCMOS, 3.3 V / 2.5 V / 1.8 V / 1.5 V —
Configuration Method SRAM, serial or parallel via Altera EPC devices SRAM-based, volatile configuration
Process Technology 0.22 µm SRAM 0.22 µm CMOS
Programming Interface JTAG (IEEE 1149.1) / in-system programmable —
RoHS 狀態 [DATA_NEEDED: RoHS status] Compliant
Series — ACEX-1K
Logic Cells / Elements — 2,880
Number of LABs/CLBs — 360
User I/Os — 186
Number of Gates — 50,000
Voltage - Supply — 2.375 V to 2.625 V (nominal 2.5 V)
Propagation Delay — 0.4 ns (per Partstack listing)
封裝 / 外殼 — 256-BGA (FineLine BGA, 17x17 mm)
安裝類型 — Surface Mount
安裝方式 — SMD/SMT
Programming Type — In-System Programmable via JTAG (IEEE 1149.1)
REACH Status — Compliant
MSL 等級 — [DATA_NEEDED: MSL level]

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