EP1K50FC256-3AA vs EP1K50FC256-1N 比較
詳細並排比較 EP1K50FC256-3AA 由 Intel 與 EP1K50FC256-1N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP1K50FC256-3AA | EP1K50FC256-1N |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Series | ACEX-1K | ACEX-1K (2.5 V) |
| Family | ACEX 1K Device Family (2.5V) | ACEX-1K |
| Number of Logic Elements | 2880 | — |
| Number of LABs (Logic Array Blocks) | 360 | — |
| Total RAM Bits | 40960 | — |
| Number of I/O Pins | 186 | — |
| Number of Gates | 50000 (typical) | — |
| Core Voltage | 2.5 V (2.375 V to 2.625 V) | — |
| 工作溫度 | 0 °C to 70 °C (commercial) | 0 C to 70 C (commercial) |
| Speed Grade | -3 (faster tier) | -1 (commercial) |
| 封裝 | 256-BGA (FBGA, 17x17 mm) | 256-ball FBGA (FineLine BGA) |
| 安裝類型 | Surface Mount | Surface Mount |
| Process Technology | 0.22 µm CMOS SRAM | 0.22 um CMOS |
| Configuration Method | SRAM (volatile, requires external config device) | SRAM-based, JTAG (IEEE 1149.1) |
| Number of PLLs | 4 (per family datasheet) | — |
| Number of Global Clocks | [DATA_NEEDED: number of global clocks] | — |
| RoHS 狀態 | non_compliant (legacy BGA, pre-RoHS or exemption dependent on date code) | Compliant |
| Maximum Logic Elements | — | 2,880 |
| Logic Array Blocks (LABs) | — | 360 |
| Typical Gates | — | 50,000 |
| Maximum System Gates | — | 199,000 |
| Embedded Memory (EAB) Bits | — | 40,960 bits |
| User I/O Pins | — | 186 |
| Core Supply Voltage | — | 2.5 V (2.375 V to 2.625 V) |
| Maximum Internal Frequency | — | 250 MHz |
| Typical Operating Current | — | 5 mA |
| Lead Status | — | Lead-free (-N suffix) |
| Programmable I/O Standards | — | LVTTL, LVCMOS, PCI, GTL+ |