EP1M120F484-6 vs EP1M120F484C6N 比較
詳細並排比較 EP1M120F484-6 由 Altera 與 EP1M120F484C6N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP1M120F484-6 | EP1M120F484C6N |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 最後購買 | Obsolete |
| Family | Mercury (EP1M) | Mercury (APEX PLD platform) |
| Logic Elements | 4,800 | — |
| System Gates | 120,000 | — |
| Embedded Memory (bits) | 49,152 | — |
| User I/Os | 303 | 303 |
| 封裝 | 484-ball FineLine BGA (FC-FBGA) | 484-ball FC-FBGA (FineLine BGA) |
| Speed Grade | -6 (commercial, slowest Mercury grade) | — |
| 工作溫度 | 0 C to 85 C (commercial) | 0C to 85C (commercial) |
| Core Supply Voltage | 1.8 V | — |
| Logic Family | CMOS (SRAM-based) | — |
| High-Speed Transceiver Channels | 8 channels up to 1.25 Gbps with embedded CDR | — |
| I/O Standards Supported | LVDS, LVCMOS, LVTTL, SSTL | — |
| 安裝類型 | Surface Mount (BGA) | Surface Mount |
| MSL 等級 | [DATA_NEEDED: MSL rating] | 3 (per JEDEC J-STD-020) |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance] | Compliant |
| Configuration Method | SRAM-based, requires external configuration device | — |
| Typical Gates | — | 120,000 |
| Logic Cells / Elements | — | 4,800 |
| Logic Array Blocks (LABs) | — | 480 |
| Core Supply Voltage (VCCINT) | — | 1.71 V to 1.89 V (1.8 V nominal) |
| Transceiver Data Rate | — | Up to 1.25 Gbps with CDR |
| Process Technology | — | CMOS |
| Architecture | — | LUT-based, optimized for high-speed interconnect |
| MultiCore Support | — | Yes (hot socketing) |