EP1S10B672C6 vs EP1S10F672I7 比較
詳細並排比較 EP1S10B672C6 由 Intel 與 EP1S10F672I7 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP1S10B672C6 | EP1S10F672I7 |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | 最後購買 |
| Manufacturer | Intel / Altera | — |
| Series | Stratix | — |
| Logic Elements / Cells | 10,570 | — |
| LABs / CLBs | 1,057 | — |
| User I/Os | 345 | — |
| 封裝 | 672-BBGA (35 x 35 mm, 1.27 mm pitch) | FBGA-672, 35 x 35 mm, 1.27 mm pitch |
| Supply Voltage (Core) | 1.5 V (1.425 V - 1.575 V) | — |
| Process Technology | 130 nm CMOS | 0.13 um CMOS |
| Maximum Operating Frequency | 450.05 MHz | — |
| 工作溫度 | 0 C to 85 C (Commercial Extended) | 0 C to +85 C (industrial grade, I7) |
| Logic Family | CMOS | CMOS |
| 安裝類型 | Surface Mount (BGA) | Surface Mount (BGA) |
| Supplier Device Package | 672-BGA | — |
| Memory | Embedded TriMatrix (MRAM/M4K) blocks | — |
| DSP Blocks | Yes, dedicated multiply-accumulate blocks | Yes (dedicated hardware multipliers) |
| Clock Management | PLLs for clock synthesis | — |
| Configuration | JTAG / passive serial / fast passive parallel | — |
| RoHS 狀態 | Compliant | unknown - verify per lot |
| Family | — | Stratix |
| Logic Elements | — | 10,570 |
| User I/O Pins | — | 345 |
| Core Supply Voltage | — | 1.5 V |
| Maximum Internal Clock | — | 420.17 MHz (per datasheet) |
| Device Type | — | FPGA (Field Programmable Gate Array) |
| Total Pins | — | 672 (FBGA) |
| Configuration Method | — | JTAG / serial / parallel PROM |
| 記憶體類型 | — | TriMatrix embedded block RAM + distributed RAM |