EP1S20F672I7N vs EP1S20F672I7 比較

詳細並排比較 EP1S20F672I7N 由 Intel 與 EP1S20F672I7 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Intel
EP1S20F672I7 EP1S20F672I7 - Stratix FPGA, 18,460 LEs, 672-BGA | Intel / Altera

EP1S20F672I7 - Stratix FPGA, 18,460 LEs, 672-BGA | Intel / Altera

EP1S20F672I7 ⚠ 最後購買機會

規格比較

參數 EP1S20F672I7N EP1S20F672I7
品牌 Intel Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete 最後購買
Family Stratix Stratix (first generation)
Logic Elements 18,460 —
Logic Array Blocks (LABs) 1,846 —
Maximum User I/Os 426 426
Embedded Memory (RAM bits) 1,669,248 —
Total Memory Bits 1,669,248 —
Number of I/O Banks 8 —
Process Technology 130 nm CMOS —
Core Supply Voltage (VCCINT) 1.5 V —
I/O Supply Voltage (VCCIO) 1.5 V / 1.8 V / 2.5 V / 3.3 V —
封裝 672-BBGA (FineLine BGA, 35 x 35 mm, 1.27 mm pitch) 672-BBGA (FineLine BGA), 35 x 35 mm, 1.27 mm pitch
工作溫度 0 C to 85 C (Industrial) -40C to +85C (industrial grade, I7 suffix)
Operating Frequency (max) 420.17 MHz —
安裝類型 Surface Mount (BGA) Surface Mount (BGA)
MSL 等級 3 (168 hours) unknown
Lead-Free / RoHS Compliant —
Logic Elements (LEs) — 18,460
Maximum RAM Bits — 1,669,248
DSP Blocks — [DATA_NEEDED: exact DSP block count]
Supply Voltage (VCCINT core) — 1.5 V
Logic Family — CMOS
Configuration Modes — Passive Serial, Passive Parallel, JTAG
Number of Pins / Balls — 672
Clock Management PLLs — [DATA_NEEDED: PLL count]
RoHS 狀態 — unknown
Lead-Free / Finish — SnPb (e0 per Partstack datasheet extract)
Status — Last Time Buy (per distributor notices)

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