EP1S20F780C6N vs EP1S20F780I6N 比較
詳細並排比較 EP1S20F780C6N 由 Intel 與 EP1S20F780I6N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP1S20F780C6N | EP1S20F780I6N |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 最後購買 | 最後購買 |
| Family | Stratix | — |
| Manufacturer | Intel (formerly Altera) | — |
| Process Technology | 130 nm CMOS | — |
| Logic Elements (LEs) | 18,460 | — |
| Configurable Logic Blocks (CLBs) | 2,132 | — |
| Embedded Memory Bits | 1,669,248 | — |
| 記憶體類型 | TriMatrix (M512 / M4K / M-RAM blocks) | — |
| DSP Blocks | Embedded 9x9 multiplier blocks | — |
| Maximum User I/O Pins | 586 | — |
| 封裝 | 780-ball FC-FBGA (Fine-pitch BGA) | 780-BBGA, FCBGA |
| Package Dimensions | 29 x 29 mm, 1.0 mm pitch | — |
| Core Supply Voltage | 1.5 V | — |
| 工作溫度 | 0 C to +85 C (commercial) | -40 °C to +85 °C (Industrial) |
| Speed Grade | C6 (6 ns pin-to-pin delay class) | -6 |
| Maximum Internal Frequency | 450.05 MHz | — |
| Lead-Free / RoHS | Yes (lead-free) | — |
| Configuration Methods | PS, PPS, PPA, JTAG via EPC configuration device | — |
| I/O Standards Supported | LVTTL, LVCMOS, LVDS, SSTL, HSTL, PCI, PCI-X | — |
| Series | — | Stratix |
| Logic Elements (LE) | — | 18460 |
| Logic Array Blocks (LABs) | — | 1846 |
| Total Memory Bits | — | 1669248 |
| User I/O Count | — | 586 |
| Number of LABs/CLBs | — | 1846 |
| Core Voltage | — | 1.5 V |
| Package Pin/Ball Count | — | 780 |
| Ball Pitch | — | 1.0 mm |
| 安裝類型 | — | Surface Mount |
| RoHS 狀態 | — | [DATA_NEEDED: RoHS status] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |