EP1S25B672C6N vs EP1S25B672C7N 比較
詳細並排比較 EP1S25B672C6N 由 Intel 與 EP1S25B672C7N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP1S25B672C6N | EP1S25B672C7N |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | NRND |
| Series | Stratix | — |
| Family | Stratix FPGA | Stratix |
| Manufacturer | Intel (Altera) | — |
| Logic Elements | 25,660 | — |
| Number of LABs/CLBs | 2,566 | — |
| Total RAM Bits | 1,944,576 | — |
| Number of I/O | 473 | — |
| Number of Pins/Terminals | 672 | — |
| Package Type | 672-BBGA (35 x 35 mm, 1.27 mm pitch) | 672-BGA (BBGA), 35 x 35 mm, 1.27 mm pitch |
| 安裝類型 | Surface Mount (BGA) | Surface Mount |
| Supply Voltage (Core) | 1.5 V | 1.5 V |
| 工作溫度 | 0 C to +85 C (Commercial Extended) | 0 °C to 85 °C (Commercial) |
| Process Technology | 0.13 µm CMOS | 130 nm |
| Embedded Memory | TriMatrix (M512, M4K, M-RAM) | TriMatrix RAM blocks |
| DSP Blocks | Yes (embedded multipliers) | Yes (dedicated multiplier/accumulator) |
| Configuration Mode | Serial/Parallel EPC, JTAG, CPU passive | — |
| RoHS 狀態 | Unknown (legacy Stratix; consult distributor for specific date code) | Compliant (per Intel/Altera product page) |
| Temperature Grade | Commercial Extended | — |
| Logic Elements / Cells | — | 25660 |
| Number of User I/O | — | 473 |
| 腳位數 | — | 672 |
| Logic Family | — | CMOS |
| Maximum Operating Frequency | — | 420.17 MHz |
| Configuration Method | — | SRAM-based, JTAG (IEEE 1149.1) |
| I/O Standards Supported | — | LVTTL, LVCMOS, LVDS, SSTL, HSTL |
| PLLs | — | Yes (on-die) |