EP1S25F780C5N vs EP1S25F780C7 比較
詳細並排比較 EP1S25F780C5N 由 Intel 與 EP1S25F780C7 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP1S25F780C5N | EP1S25F780C7 |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | NRND |
| Family | Stratix | Stratix |
| Logic Elements | 25,660 | 25,660 |
| Logic Array Blocks (LABs) | 2,566 | — |
| Maximum User I/O | 597 | — |
| 封裝 | 780-ball FBGA, 29 x 29 mm, 1.0 mm pitch | 780-ball FC-FBGA (FineLine BGA) |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| Core Supply Voltage | 1.5 V | — |
| 工作溫度 | 0 C to 85 C (Commercial Extended) | 0C to +85C (Commercial) |
| Embedded Memory | TriMatrix memory blocks, up to ~1.92 Mbits total | — |
| DSP Blocks | Dedicated multiplier/accumulator blocks | — |
| PLLs | 4 | — |
| I/O Banks | 12 | — |
| Maximum Frequency (internal) | up to 500 MHz logic, 420 MHz DSP | — |
| Supported I/O Standards | LVTTL, LVCMOS, SSTL, HSTL, LVDS, LVPECL, PCI, PCI-X | — |
| Configuration Modes | Passive Serial, Passive Parallel Sync/Async, JTAG | — |
| RoHS 狀態 | [DATA_NEEDED: confirm per specific reel lot] | — |
| 安裝類型 | Surface Mount (BGA) | Surface Mount (BGA) |
| MSL 等級 | [DATA_NEEDED: MSL rating per JEDEC J-STD-020] | [DATA_NEEDED: MSL level] |
| LABs / CLBs | — | 2,566 LABs |
| Total Memory Bits | — | 1,944,576 bits |
| User I/Os | — | 597 |
| Package Dimensions | — | 29 x 29 mm |
| Ball Pitch | — | 1 mm |
| Core Voltage (VCCINT) | — | 1.5 V |
| Internal Performance | — | up to 420.17 MHz |
| Speed Grade | — | 7 |