EP1S60F1020C7 vs EP1S60F1020 比較

詳細並排比較 EP1S60F1020C7 由 Altera 與 EP1S60F1020 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Altera
EP1S60F1020 EP1S60F1020 - Stratix 57K LEs, 1020-BGA FPGA | Altera

EP1S60F1020 - Stratix 57K LEs, 1020-BGA FPGA | Altera

EP1S60F1020 ⚠ 最後購買機會

規格比較

參數 EP1S60F1020C7 EP1S60F1020
品牌 Altera Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete 最後購買
Series Stratix Stratix
Family Stratix (EP1S60) Altera Stratix (EP1S)
Logic Elements 57,120 —
Total Memory Bits 5,215,104 —
Maximum User I/O 773 —
封裝 1020-BBGA, FCBGA, 33 x 33 mm, 1.0 mm pitch 1020-BGA (FineLine FBGA)
安裝類型 Surface Mount Surface Mount (BGA)
Logic Family CMOS —
工作溫度 0C to +85C (Commercial) —
Core Supply Voltage 1.5 V —
Speed Grade 7 —
Logic Cells / Logic Blocks 6,570 (per datasheet Section I nomenclature) —
DSP Blocks Embedded dedicated multiplier / adder blocks —
PLLs Up to 12 enhanced PLLs per die [DATA_NEEDED: PLL count, nominally 12 for Stratix EP1S60]
Configuration Method Serial or parallel with optional decompression —
MSL 等級 3 (per BGA moisture-sensitivity norms) [DATA_NEEDED: MSL rating]
RoHS 狀態 Compliant (lead-free) [DATA_NEEDED: verify per part suffix]
Process Technology — 0.13 um CMOS
Logic Elements (LEs) — 57,120
Logic Array Blocks (LABs) — 5,712
Total RAM Bits — 5,215,104
Embedded Multipliers (DSP Blocks) — [DATA_NEEDED: DSP block count]
User I/Os — 773
Core Voltage — 1.5 V
Operating Temperature (base part) — Commercial (0C to +85C)
Speed Grade (base part) — [DATA_NEEDED: trailing suffix needed for explicit grade]
I/O Standard Support — LVDS, LVPECL, SSTL, HSTL, PCI/PCI-X
Configuration Memory — SRAM-based, requires external configuration device

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