EP1S60F1020C7 vs EP1S60F1020C5 比較
詳細並排比較 EP1S60F1020C7 由 Altera 與 EP1S60F1020C5 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP1S60F1020C7 | EP1S60F1020C5 |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | 最後購買 |
| Series | Stratix | Stratix |
| Family | Stratix (EP1S60) | Stratix (EP1S) |
| Logic Elements | 57,120 | 57,120 |
| Total Memory Bits | 5,215,104 | — |
| Maximum User I/O | 773 | — |
| 封裝 | 1020-BBGA, FCBGA, 33 x 33 mm, 1.0 mm pitch | — |
| 安裝類型 | Surface Mount | Surface Mount |
| Logic Family | CMOS | — |
| 工作溫度 | 0C to +85C (Commercial) | 0 C to 85 C (Commercial) |
| Core Supply Voltage | 1.5 V | — |
| Speed Grade | 7 | C5 |
| Logic Cells / Logic Blocks | 6,570 (per datasheet Section I nomenclature) | — |
| DSP Blocks | Embedded dedicated multiplier / adder blocks | — |
| PLLs | Up to 12 enhanced PLLs per die | — |
| Configuration Method | Serial or parallel with optional decompression | — |
| MSL 等級 | 3 (per BGA moisture-sensitivity norms) | — |
| RoHS 狀態 | Compliant (lead-free) | — |
| Configurable Logic Blocks (CLBs) | — | 6,570 |
| Total RAM Bits | — | 5,215,104 (5.2 Mbit) |
| User I/O Pins | — | 773 |
| Number of PLLs | — | 12 |
| Core Voltage | — | 1.5 V |
| I/O Voltage Tolerance | — | 3.3 V (multi-standard) |
| Package Type | — | FBGA-1020 (FineLine BGA) |
| Package Dimensions | — | 33 x 33 mm |
| Ball Pitch | — | 1.0 mm |
| Process Technology | — | 0.13 µm CMOS, 1.5 V core |