EP1S60F1020I6 vs EP1S60F1020C7 比較
詳細並排比較 EP1S60F1020I6 由 Altera 與 EP1S60F1020C7 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP1S60F1020I6 | EP1S60F1020C7 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 最後購買 | Obsolete |
| Family | Stratix | Stratix (EP1S60) |
| Logic Elements | 57,120 | 57,120 |
| Logic Array Blocks (LABs) | 6,570 | — |
| Embedded Memory Bits | 5,215,104 bits | — |
| Maximum User I/O | 773 | 773 |
| Process Technology | 130 nm CMOS | — |
| Core Supply Voltage | 1.5 V | 1.5 V |
| Maximum Internal Frequency | 450 MHz | — |
| 封裝 | 1020-ball FC-FBGA (33 x 33 mm, 1 mm pitch) | 1020-BBGA, FCBGA, 33 x 33 mm, 1.0 mm pitch |
| Operating Temperature (I-grade) | -40C to +100C (case) | — |
| Speed Grade | -6 | 7 |
| 安裝類型 | Surface Mount (BGA) | Surface Mount |
| RoHS 狀態 | Compliant | Compliant (lead-free) |
| Lead-Free | Yes | — |
| MSL 等級 | 3 | 3 (per BGA moisture-sensitivity norms) |
| Series | — | Stratix |
| Total Memory Bits | — | 5,215,104 |
| Logic Family | — | CMOS |
| 工作溫度 | — | 0C to +85C (Commercial) |
| Logic Cells / Logic Blocks | — | 6,570 (per datasheet Section I nomenclature) |
| DSP Blocks | — | Embedded dedicated multiplier / adder blocks |
| PLLs | — | Up to 12 enhanced PLLs per die |
| Configuration Method | — | Serial or parallel with optional decompression |