EP1SGX25DF1020C6B vs EP1SGX25DF1020C6ES 比較
詳細並排比較 EP1SGX25DF1020C6B 由 Altera 與 EP1SGX25DF1020C6ES 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP1SGX25DF1020C6B | EP1SGX25DF1020C6ES |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | 最後購買 |
| Series | Stratix GX | — |
| Family | EP1SGX25 | Stratix GX |
| Logic Elements | 25,660 | 25660 cells |
| Total Memory Bits | 1,944,576 | — |
| User I/O Count | 607 | — |
| 封裝 | 1020-BBGA (33 × 33 mm, 1.0 mm pitch) | FBGA-1020, 33 mm × 33 mm, 1.00 mm pitch |
| Supply Voltage (Core) | 1.5 V | 1.5 V |
| 工作溫度 | 0 °C to 85 °C (Commercial) | 0 C to 85 C |
| Speed Grade | C6 | — |
| 安裝類型 | Surface Mount (BGA) | Surface Mount |
| MSL 等級 | [DATA_NEEDED: MSL rating] | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: confirm RoHS] |
| Lead-Free | Yes (per DigiChip package note) | Yes |
| Transceivers | Embedded high-speed serial transceivers (multi-gigabit) | — |
| PLLs | On-chip phase-locked loops for clock management | — |
| DSP Blocks | Hardware multipliers / DSP blocks | Yes |
| External Memory Support | DDR, DDR2, SDR, QDR, QDRII SRAM | — |
| Hard IP | PCI Express (per Stratix GX family) | — |
| Configurable Logic Blocks (CLBs) | — | 2566 |
| Maximum User I/Os | — | 607 |
| Number of LABs/CLBs | — | 2566 |
| Total RAM Bits | — | [DATA_NEEDED: total RAM bits] |
| Process Technology | — | 130 nm CMOS |
| Logic Family | — | CMOS |
| Configuration Interface | — | JTAG / Passive Serial / Passive Parallel |
| Embedded Transceivers | — | Yes (multi-gigabit) |