EP1SGX25DF1020C6ESL vs EP1SGX25DF1020C4 比較
詳細並排比較 EP1SGX25DF1020C6ESL 由 Altera 與 EP1SGX25DF1020C4 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EP1SGX25DF1020C6ESL - Stratix GX FPGA, 25K LE, 1020-BGA | Altera/Intel
EP1SGX25DF1020C6ESL Obsolete
規格比較
| 參數 | EP1SGX25DF1020C6ESL | EP1SGX25DF1020C4 |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | Stratix GX | Stratix GX |
| Logic Elements | 25,660 | 25,660 |
| Total RAM Bits | 1,944,576 bits | — |
| User I/O Pins | 607 | — |
| LABs/CLBs | 2,566 | — |
| 封裝 | 1020-BBGA (FineLine BGA) | 1020-ball FineLine BGA (FBGA) |
| Core Voltage | 1.5 V | 1.5 V |
| 工作接面溫度 | 0 C to 85 C | — |
| 安裝類型 | Surface Mount | Surface Mount (BGA) |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | Compliant |
| Configuration Method | Passive Serial / Fast Passive Parallel / JTAG | — |
| Process Node | 0.13 um CMOS | — |
| Transceivers | Embedded multi-gigabit transceivers (per Stratix GX family) | — |
| DSP Blocks | Yes (embedded DSP blocks) | 80 (18x18-bit multipliers) |
| Speed Grade | C6 | C4 |
| I/O Standards Supported | LVTTL, LVCMOS, SSTL, HSTL, LVDS (per family) | — |
| Series | — | EP1SGX25 |
| Embedded Memory | — | 1,944 Kbit |
| Transceiver Channels | — | 20 (up to 3.125 Gbps) |
| 工作溫度 | — | 0C to +85C (commercial) |
| Process | — | 0.13 um CMOS SRAM |
| I/O Standards | — | LVTTL, LVCMOS, LVDS, SSTL, HSTL |
| PLLs | — | Yes (clock management) |
| Configuration | — | JTAG, Passive Serial, Active Serial |