EP1SGX25DF800C5N vs EP1SGX25DF672C6N 比較
詳細並排比較 EP1SGX25DF800C5N 由 Intel 與 EP1SGX25DF672C6N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Intel
EP1SGX25DF672C6N - Stratix GX FPGA, 25K LE, 672-FBGA | Intel (Altera)
EP1SGX25DF672C6N Obsolete規格比較
| 參數 | EP1SGX25DF800C5N | EP1SGX25DF672C6N |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | Stratix GX | Stratix GX (Stratix I GX) |
| Device Logic Elements | 25,660 (typical) | — |
| Transceiver Channels | 8 (full-duplex) | — |
| Maximum Transceiver Data Rate | 3.1875 Gbps per channel | — |
| Process Technology | 130 nm | 130 nm CMOS |
| Supply Voltage (Core) | 1.5 V typical | — |
| 封裝 | FBGA-800 (FineLine BGA, 31x31 mm) | FBGA-672 (FC-FBGA), 33 x 33 mm, 1.0 mm pitch |
| Speed Grade | C5 (commercial) | — |
| 工作溫度 | 0C to +85C (commercial) | 0C to 85C (commercial) |
| Lead-Free / RoHS Status | Lead-free (N suffix) | — |
| On-Chip Memory (TriMatrix) | Approx. 2 Mbits total | — |
| PLLs | Up to 40 (device-wide) | — |
| Embedded 8b/10b Encoder/Decoder | Yes (one per transceiver channel) | — |
| PCI Express Hard IP | x1, x4 endpoints supported | — |
| DSP Blocks | Embedded multiplier blocks (family-wide) | — |
| 安裝類型 | Surface Mount (BGA) | Surface Mount |
| MSL 等級 | [DATA_NEEDED: MSL Level] | 3 (168 hours) |
| Development Software | Quartus II (legacy) | — |
| Series | — | Stratix GX |
| Logic Elements / Cells | — | 25,660 |
| Logic Array Blocks (LABs) | — | 2,566 |
| User I/O Count | — | 455 |
| Core Supply Voltage | — | 1.5 V |
| Logic Family | — | CMOS |
| HTSUS Code | — | 8542.39.0001 |
| RoHS 狀態 | — | Lead Free (per part suffix 'N' designator) |
| 腳位數 | — | 672 |