EP1SGX40CF1020I5 vs EP1S40F1020C5 比較

詳細並排比較 EP1SGX40CF1020I5 由 Altera 與 EP1S40F1020C5 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP1SGX40CF1020I5 EP1S40F1020C5
品牌 Altera Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete Obsolete
Series Stratix GX Stratix I
Family Stratix (first generation) Stratix
Logic Elements 41,250 41,250
Configurable Logic Blocks (CLBs) 4,125 —
Total RAM Bits 3,423,744 —
Number of Logic Cells / Gates [DATA_NEEDED: gate count equivalent] —
Process Technology CMOS 130 nm
Supply Voltage (Core) 1.5 V —
Number of Transceivers 624 (per DigiKey listing family variant) —
Number of I/O Pins [DATA_NEEDED: user I/O count] —
Package Type FBGA-1020 (FineLine BGA) —
Package Dimensions 33 mm x 33 mm —
Ball Pitch 1.0 mm —
工作溫度 -40C to +100C (industrial, I suffix) 0C to +85C (Commercial)
安裝類型 Surface Mount Surface Mount (BGA)
RoHS 狀態 [DATA_NEEDED: confirmed RoHS per Intel/Altera] [DATA_NEEDED: rohs status]
Configuration Memory SRAM-based (external config device required) —
Speed Grade 5 C5
Device Family Suffix Decoding C = standard logic, F = enhanced, I = industrial temp —
Logic Array Blocks (LABs) — 4,125
Maximum User I/Os — 773
Embedded Memory — 3.4 Mbits (TriMatrix)
DSP Blocks — Yes (dedicated hardware multipliers)
Core Voltage — 1.425 V to 1.575 V
封裝 — 1020-ball FC-FBGA (33 mm x 33 mm)
Maximum Internal Clock — up to 500 MHz
I/O Standards Supported — LVTTL, LVCMOS, SSTL, HSTL, LVDS, PCI

資料表與資源

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