EP1SGX40G vs EP1SGX40DF1020C6 比較

詳細並排比較 EP1SGX40G 由 Intel 與 EP1SGX40DF1020C6 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Altera
EP1SGX40DF1020C6 EP1SGX40DF1020C6 - Stratix GX 41,250 Cells FPGA, 624 I/O | Altera

EP1SGX40DF1020C6 - Stratix GX 41,250 Cells FPGA, 624 I/O | Altera

EP1SGX40DF1020C6 ⚠ 最後購買機會

規格比較

參數 EP1SGX40G EP1SGX40DF1020C6
品牌 Intel Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete 最後購買
Family Stratix GX Stratix GX FPGA
Logic Elements 41,250 —
Total RAM Bits 3,423,744 [DATA_NEEDED: total RAM bits]
DSP Blocks [DATA_NEEDED: DSP block count] —
Maximum User I/O Pins 624 —
封裝 1020-pin FineLine BGA —
Number of Transceivers 20 —
Maximum Transceiver Data Rate 3.1875 Gbps —
Minimum Transceiver Data Rate 500 Mbps —
Transceiver Channels per Bank 4 —
Supported Serial Standards PCI Express, XAUI, Serial RapidIO, SerialLite II —
8B/10B Encoder/Decoder Hardware (dedicated per channel) —
PLLs [DATA_NEEDED: PLL count] —
Speed Grades Available C5, C6, C7, I5, I6, I7 —
Operating Temperature Range (Commercial) 0C to +85C —
Operating Temperature Range (Industrial) -40C to +100C —
Configuration Method EPC enhanced configuration devices, JTAG —
Process Technology [DATA_NEEDED: process node] 130 nm CMOS
RoHS 狀態 [DATA_NEEDED: RoHS compliance] [DATA_NEEDED: RoHS compliance]
Vertical Migration Supported within 1020-pin FineLine BGA package (EP1SGX25/EP1SGX40) —
Series — Stratix GX
Manufacturer — Altera (Intel)
Logic Cells — 41,250
Number of LABs/CLBs — 4,125
Number of I/O — 624
Voltage - Supply — 1.425 V to 1.575 V (1.5 V nominal)
工作溫度 — 0C to +85C (commercial)
封裝 / 外殼 — 1020-BBGA, FCBGA (FC-FBGA)
Supplier Device Package — 1020-FBGA (33 x 33 mm, 1 mm pitch)
安裝類型 — Surface Mount
Maximum Internal Performance — 5000 MHz (per datasheet rating)
Logic Family — CMOS, SRAM-based configuration
Programmable Type — In-System Programmable (SRAM)
High-Speed Transceivers — Embedded (per Stratix GX family)
Configuration Modes — JTAG, Passive Serial, Fast Passive Parallel, Active Serial
Packaging — Bulk / Tray

資料表與資源

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