EP1SGX40GF1020C6L vs EP1SGX40GF1020C7L 比較
詳細並排比較 EP1SGX40GF1020C6L 由 Intel 與 EP1SGX40GF1020C7L 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EP1SGX40GF1020C7L - 41,250 LE Stratix GX FPGA, 1020-BGA | Intel / Altera
EP1SGX40GF1020C7L Obsolete規格比較
| 參數 | EP1SGX40GF1020C6L | EP1SGX40GF1020C7L |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | Stratix GX | Stratix GX |
| Logic Elements | 41,250 | — |
| Embedded Memory (bits) | 3,423,744 | — |
| Maximum User I/O Pins | 624 | — |
| Number of Transceivers | Up to 20 (data rate up to 6.375 Gbps) | — |
| Core Supply Voltage | 1.5 V | — |
| Process Technology | 130 nm CMOS | 130 nm CMOS |
| 封裝 | 1020-ball FC-BGA, 33 mm x 33 mm, 1 mm pitch | 1020-ball FC-FBGA |
| Operating Temperature (Commercial) | 0C to +85C | — |
| Maximum Operating Frequency | 5000 MHz (memory block, per Arrow listing) | — |
| Logic Family | CMOS | — |
| Embedded Multipliers | Yes (18 x 18 DSP blocks) | — |
| PLL Count | Up to 8 | — |
| External Memory Support | DDR, DDR2, QDR SRAM, SDR SDRAM | — |
| RoHS 狀態 | [DATA_NEEDED: rohs_status] | — |
| 安裝類型 | Surface Mount | — |
| Logic Elements (LE) | — | 41,250 |
| Logic Array Blocks (LABs) | — | 4,125 |
| User I/O Count | — | 624 |
| Core Voltage | — | 1.5 V |
| Multi-Gigabit Transceiver Data Rate | — | 500 Mbps to 3.1875 Gbps |
| Transceiver Input Reference Frequency | — | 25 MHz to 650 MHz |
| PMA Multiplication Factor (W) | — | 2, 4, 5, 8, 10, 16, 20 |
| PPM Detector Bandwidth | — | 125 / 250 / 500 / 1000 ppm |
| Speed Grade | — | -7 (commercial, L suffix) |
| PLLs | — | 4 |
| Memory Architecture | — | TriMatrix (M512, M4K, M-RAM) |
| Design Tool | — | Quartus II |