EP20K1000CB652C7NJ vs EP20K1000CB652I9 比較
詳細並排比較 EP20K1000CB652C7NJ 由 Altera 與 EP20K1000CB652I9 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K1000CB652C7NJ | EP20K1000CB652I9 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | APEX 20KC | APEX 20KC |
| Logic Elements | 38,400 | 38,400 |
| System Gates | 1,000,000 | 1,000,000 |
| Embedded Memory | 327,680 bits | — |
| User I/O Pins | 488 | — |
| Maximum Frequency | 375.94 MHz | 250 MHz |
| Process Technology | 0.15 um CMOS (all-layer copper) | — |
| Core Supply Voltage | 1.8 V | — |
| 封裝 | 652-pin FCBGA (FineLine BGA) | 652-ball FCBGA / LBGA |
| 安裝類型 | Surface Mount | Surface Mount |
| 工作溫度 | Commercial (0C to +70C) per C7 speed grade | -40 °C to +100 °C (industrial grade) |
| Configuration Interface | JTAG (ByteBlaster/MasterBlaster) + serial/parallel modes | — |
| PLLs | 4 | — |
| Pin-Compatible Family | APEX 20KE | — |
| Design Software | Quartus II (legacy Altera IDE) | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | unknown (legacy product) |
| Lifecycle | Obsolete - last time buy per Altera PCN | — |
| Maximum User I/O | — | 488 |
| Technology | — | 0.15 µm CMOS |
| Core Voltage | — | 1.8 V (nominal, 1.71 V – 1.89 V) |
| Supply Voltage Range | — | 1.71 V to 1.89 V |
| Ball Pitch | — | 1.27 mm |
| Terminal Form | — | Ball |
| Macrocell Output Function | — | Yes (configurable I/O) |
| Lead-Free | — | unknown |