EP20K100CQ240C7 vs EP20K100CQ240C7ES 比較
詳細並排比較 EP20K100CQ240C7 由 Altera 與 EP20K100CQ240C7ES 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Intel
EP20K100CQ240C7ES - 100K Gates APEX20K FPGA, 189 I/O, 240-PQFP | Intel
EP20K100CQ240C7ES Obsolete規格比較
| 參數 | EP20K100CQ240C7 | EP20K100CQ240C7ES |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | APEX-20K | APEX20K |
| Device Type | FPGA (Field Programmable Gate Array) | — |
| System Gates | 100,000 | — |
| Logic Elements | 53,248 | 4,160 |
| Embedded Memory Bits | 4,160 | — |
| Maximum User I/O Pins | 189 | — |
| Package Type | 240-BFQFP | 240-pin PQFP (BQFP) |
| Speed Grade | C7 | -7 |
| 工作溫度 | 0C to +85C (commercial) | Commercial (0C to +70C) |
| Supply Voltage - Core | [DATA_NEEDED: core voltage] | — |
| I/O Standards Supported | LVTTL, LVCMOS, PCI, GTL (per family datasheet) | — |
| Number of PLLs | 4 (per APEX-20K family datasheet) | — |
| Embedded System Blocks (ESBs) | Yes (per APEX-20K family) | — |
| 安裝類型 | Surface Mount | Surface Mount |
| RoHS 狀態 | unknown | [DATA_NEEDED: lead-free/RoHS variant status] |
| Lead-Free | unknown | — |
| MSL 等級 | [DATA_NEEDED: MSL rating] | — |
| Programming Tool | Altera Quartus / MAX+PLUS II (per family) | — |
| Typical Gates | — | 100,000 |
| Maximum System Gates | — | 263,000 |
| Number of I/O | — | 189 |
| Embedded RAM Bits | — | 53,248 |
| Embedded Array Blocks (EAB) | — | Yes |
| Supply Voltage Core | — | 2.5 V |
| Process Technology | — | 0.22 µm CMOS |
| Configuration Method | — | JTAG / Serial PROM (EPC2/EPC16) |
| PLL | — | Yes |
| MultiVolt I/O Support | — | 1.8V / 2.5V / 3.3V / 5.0V |