EP20K100CQ240C7ES vs EP20K100CQ240C7 比較
詳細並排比較 EP20K100CQ240C7ES 由 Intel 與 EP20K100CQ240C7 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Intel
EP20K100CQ240C7ES - 100K Gates APEX20K FPGA, 189 I/O, 240-PQFP | Intel
EP20K100CQ240C7ES Obsolete規格比較
| 參數 | EP20K100CQ240C7ES | EP20K100CQ240C7 |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | APEX20K | APEX-20K |
| Logic Elements | 4,160 | 53,248 |
| Typical Gates | 100,000 | — |
| Maximum System Gates | 263,000 | — |
| Number of I/O | 189 | — |
| Embedded RAM Bits | 53,248 | — |
| Embedded Array Blocks (EAB) | Yes | — |
| Package Type | 240-pin PQFP (BQFP) | 240-BFQFP |
| 安裝類型 | Surface Mount | Surface Mount |
| Speed Grade | -7 | C7 |
| 工作溫度 | Commercial (0C to +70C) | 0C to +85C (commercial) |
| Supply Voltage Core | 2.5 V | — |
| Process Technology | 0.22 µm CMOS | — |
| Configuration Method | JTAG / Serial PROM (EPC2/EPC16) | — |
| PLL | Yes | — |
| MultiVolt I/O Support | 1.8V / 2.5V / 3.3V / 5.0V | — |
| RoHS 狀態 | [DATA_NEEDED: lead-free/RoHS variant status] | unknown |
| Device Type | — | FPGA (Field Programmable Gate Array) |
| System Gates | — | 100,000 |
| Embedded Memory Bits | — | 4,160 |
| Maximum User I/O Pins | — | 189 |
| Supply Voltage - Core | — | [DATA_NEEDED: core voltage] |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, GTL (per family datasheet) |
| Number of PLLs | — | 4 (per APEX-20K family datasheet) |
| Embedded System Blocks (ESBs) | — | Yes (per APEX-20K family) |
| Lead-Free | — | unknown |
| MSL 等級 | — | [DATA_NEEDED: MSL rating] |
| Programming Tool | — | Altera Quartus / MAX+PLUS II (per family) |