EP20K100EFC144-1 vs EP20K100EBC356-3N 比較
詳細並排比較 EP20K100EFC144-1 由 Intel 與 EP20K100EBC356-3N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K100EFC144-1 | EP20K100EBC356-3N |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | Obsolete |
| Device Family | APEX 20KE | — |
| Device Type | FPGA (Field Programmable Gate Array) | — |
| Typical Gates | 100,000 | — |
| Maximum System Gates | 263,000 | — |
| Logic Elements | 4,160 | — |
| Embedded System Blocks (ESBs) | Yes (memory + dedicated logic) | 26 |
| User I/Os | 93 | — |
| Propagation Delay | 1.6 ns | 1.6 ns (speed grade -3N) |
| PLLs | 4 | — |
| Package Type | 144-ball FBGA (13x13 mm, 1.0 mm pitch) | — |
| Core Voltage (VCCINT) | 1.71 V to 1.89 V | — |
| I/O Voltage Support | 1.8 V / 2.5 V / 3.3 V (multiVolt I/O) | — |
| 工作溫度 | 0 °C to 85 °C (commercial) | 0 °C to +85 °C |
| Process Technology | 0.15-µm all-layer copper | 0.22 µm CMOS |
| Configuration Method | SRAM (volatile) - external boot PROM required | — |
| Boundary-Scan Support | IEEE 1149.1 (JTAG) | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: rohs_status] |
| 安裝類型 | Surface Mount | Surface Mount |
| Series | — | APEX-20KE |
| Family | — | APEX 20K |
| Logic Elements / Cells | — | 4160 |
| System Gates | — | 100,000 |
| Embedded Memory (bits) | — | 53,248 |
| Maximum User I/Os | — | 246 |
| 腳位數 | — | 356 |
| 封裝 | — | 356-LBGA (Ball Grid Array) |
| Package Dimensions | — | 45 x 45 mm |
| Ball Pitch | — | 1.27 mm |
| Core Supply Voltage | — | 1.8 V |
| Maximum Internal Frequency | — | 250 MHz |
| Programmable Interface | — | JTAG (IEEE 1149.1) |
| I/O Standards Supported | — | LVCMOS, LVTTL, PCI, SSTL-2/3, GTL+ |