EP20K100EFC324-2X vs EP20K100FC324-2X 比較
詳細並排比較 EP20K100EFC324-2X 由 Intel 與 EP20K100FC324-2X 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Altera
EP20K100FC324-2X - APEX 20K FPGA 100K Gates 324-BGA | Intel / Altera
EP20K100FC324-2X Obsolete規格比較
| 參數 | EP20K100EFC324-2X | EP20K100FC324-2X |
|---|---|---|
| 品牌 | Intel | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | Obsolete |
| Family | APEX 20KE | APEX-20K |
| Device Type | SPLD / FPGA (Field Programmable Gate Array) | — |
| System Gates | 100,000 gates | — |
| Logic Elements / Cells | 4,160 | — |
| Total RAM Bits | 53,248 bits | — |
| LABs / CLBs | 416 | — |
| Maximum User I/Os | 246 | — |
| Number of I/O Banks | 8 (per APEX 20KE family) | — |
| Propagation Delay | 1.6 ns | 1.6 ns |
| Internal Operating Frequency | Up to 250 MHz | — |
| Core Supply Voltage (VCCINT) | 1.8 V | — |
| I/O Supply Voltage (VCCIO) | MultiVolt: 1.8 V / 2.5 V / 3.3 V | — |
| Process Technology | 0.22 µm CMOS (all-layer copper metal) | 0.22 µm CMOS |
| Speed Grade | -2X | — |
| 封裝 | 324-ball FBGA (FineLine BGA), 19x19 mm, 1.27 mm pitch | 324-ball FineLine BGA (FBGA) |
| 安裝類型 | Surface Mount | Surface Mount |
| 工作溫度 | 0 °C to 85 °C (Commercial) | 0 °C to +85 °C (Commercial) |
| Programming Interface | IEEE 1149.1 JTAG | — |
| Configuration Modes | Passive Serial, Passive Parallel, JTAG, Altera configuration EPROM | — |
| RoHS 狀態 | [DATA_NEEDED: confirm against lot-specific documentation] | Compliant |
| Logic Elements | — | 4,160 |
| Typical Gates | — | 100,000 |
| Maximum System Gates | — | 263,000 |
| Maximum User I/O | — | 252 |
| Embedded RAM Bits | — | 53,248 |
| Operating Frequency (max) | — | 200 MHz |
| Core Supply Voltage | — | 2.5 V |
| I/O Supply Voltage | — | 3.3 V (5 V tolerant I/O) |
| Configuration Interface | — | JTAG (IEEE 1149.1) / Serial / Parallel |