EP20K100FC324-1 vs EP20K100FC324-2 比較

詳細並排比較 EP20K100FC324-1 由 Altera 與 EP20K100FC324-2 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

Intel
EP20K100FC324-2 EP20K100FC324-2 - APEX 20K 100K Gates FPGA | Intel / Altera

EP20K100FC324-2 - APEX 20K 100K Gates FPGA | Intel / Altera

EP20K100FC324-2 ⚠ 最後購買機會

規格比較

參數 EP20K100FC324-1 EP20K100FC324-2
品牌 Altera Intel
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 停產終止 最後購買
Product Type Field Programmable Gate Array (FPGA) —
Series APEX-20K —
Number of Logic Elements/Cells 4160 —
Total RAM Bits 53248 bits —
Number of User I/Os 252 —
Number of LABs/CLBs [DATA_NEEDED: Number of LABs/CLBs] —
Number of Gates [DATA_NEEDED: Number of gates] —
Maximum Internal Clock Frequency [DATA_NEEDED: fMAX] —
Core Supply Voltage 2.5 V 2.5 V
I/O Supply Voltage Range [DATA_NEEDED: I/O supply voltage range] —
封裝 / 外殼 324-BGA (FC324) —
Supplier Device Package 324-FBGA —
腳位數 324 —
安裝類型 Surface Mount —
工作溫度範圍 0 °C to +85 °C —
Architecture MultiCore: LUT logic + product-term logic + embedded memory —
Speed Grade -1 —
Configuration Memory SRAM-based (external configuration device required) —
RoHS Compliance Unknown; lead-free -1N suffix variant exists —
Device Family — APEX 20K
Equivalent Gates — 100,000
Logic Cells — 4,160
Maximum User I/Os — 252
封裝 — 324-ball FBGA
腳位數 — 324
Technology Node — 0.22 µm CMOS
Propagation Delay (tPD) — 1.6 ns
Internal Performance — 200 MHz
工作溫度 — 0°C to 85°C
Configuration Method — JTAG / serial configuration PROM
Embedded Memory — Dual-port RAM blocks (ESB)
RoHS 狀態 — [DATA_NEEDED: RoHS compliance]
Programming Toolchain — Altera Quartus / MAX+PLUS II

資料表與資源

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