EP20K100QC208-3N vs EP20K100QC208-2 比較

詳細並排比較 EP20K100QC208-3N 由 Intel 與 EP20K100QC208-2 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP20K100QC208-3N EP20K100QC208-2
品牌 Intel Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 Obsolete NRND
Device Family APEX 20K —
Device Type FPGA / CPLD (LOADABLE PLD) Field Programmable Gate Array (FPGA)
Total Gates 100K gates —
Logic Elements / Cells 4,160 4160
Maximum User I/Os 159 —
Core Supply Voltage 2.5 V —
Maximum Clock Performance 167 MHz —
Process Technology 0.22 um —
Package Code FQFP —
Package Type 208-QFP / PQFP —
Number of Terminals 208 208
Terminal Form Gull Wing Gull wing
Package Shape Square —
Speed Grade -3 —
安裝類型 Surface Mount Surface Mount
Ordering Code Suffix N (lead-free finish convention) —
工作溫度範圍 [DATA_NEEDED: operating temperature range (commercial/industrial)] —
I/O Supply Voltage [DATA_NEEDED: VCCIO range] —
Configuration Memory [DATA_NEEDED: supported EPC/configuration schemes] —
Embedded Memory Blocks [DATA_NEEDED: ESB memory bits] —
Manufacturer — Altera
Product Series — APEX-20K
Number of LABs / CLBs — 416
Total RAM Bits — 53248
Number of User I/Os — 159
Number of Gates — 263000
封裝 / 外殼 — 208-BFQFP (208-PQFP 28x28)
工作溫度 — 0°C to 85°C (TJ)
Supply Voltage (VCC) — 1.71 V ~ 1.89 V (per one distributor listing; verify against APEX-20K datasheet)
I/O Standard Support — [DATA_NEEDED: I/O standard support]
Maximum Propagation Delay (-2 speed grade) — [DATA_NEEDED: max tPD for -2 speed grade]
Configuration Technology — [DATA_NEEDED: configuration technology details]
MSL 等級 — [DATA_NEEDED: MSL level]
RoHS 狀態 — unknown
Product Lifecycle — NRND / legacy source through Rochester Electronics

資料表與資源

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