EP20K100QI208-2 vs EP20K100QC208-3N 比較
詳細並排比較 EP20K100QI208-2 由 Altera 與 EP20K100QC208-3N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K100QI208-2 | EP20K100QC208-3N |
|---|---|---|
| 品牌 | Altera | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Series | APEX-20K | — |
| Product Type | Field Programmable Gate Array (FPGA) | — |
| Number of Logic Elements / Cells | 4160 | — |
| Total RAM Bits | 53248 | — |
| Number of User I/Os | 159 | — |
| 封裝 / 外殼 | 208-BFQFP | — |
| 腳位數 | 208 | — |
| Terminal Form | Gull wing | Gull Wing |
| Terminal Pitch | 0.500 mm | — |
| Package Shape | Square | Square |
| JESD-30 Code | S-PQFP-G208 | — |
| Moisture Sensitivity Level | 3 (168 hours) | — |
| 安裝類型 | Surface Mount | Surface Mount |
| Speed Grade | -2 | -3 |
| 供應電壓 | [DATA_NEEDED: core supply voltage for exact OPN from APEX-20K datasheet] | — |
| 工作溫度 | [DATA_NEEDED: exact industrial temperature range; I-grade variant] | — |
| RoHS 狀態 | unknown for non-N ordering code | — |
| Device Family | — | APEX 20K |
| Device Type | — | FPGA / CPLD (LOADABLE PLD) |
| Total Gates | — | 100K gates |
| Logic Elements / Cells | — | 4,160 |
| Maximum User I/Os | — | 159 |
| Core Supply Voltage | — | 2.5 V |
| Maximum Clock Performance | — | 167 MHz |
| Process Technology | — | 0.22 um |
| Package Code | — | FQFP |
| Package Type | — | 208-QFP / PQFP |
| Number of Terminals | — | 208 |
| Ordering Code Suffix | — | N (lead-free finish convention) |
| 工作溫度範圍 | — | [DATA_NEEDED: operating temperature range (commercial/industrial)] |
| I/O Supply Voltage | — | [DATA_NEEDED: VCCIO range] |
| Configuration Memory | — | [DATA_NEEDED: supported EPC/configuration schemes] |
| Embedded Memory Blocks | — | [DATA_NEEDED: ESB memory bits] |